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gpu: nvgpu: gr: reduce code complexity in ctxsw_preemption_mode
nvgpu_gr_obj_ctx_set_ctxsw_preemption_mode function code complexity reduced from 13 to 8 by using following helper functions: 1. nvgpu_gr_obj_ctx_set_graphics_preemption_mode: code complexity 4 2. nvgpu_gr_obj_ctx_set_compute_preemption_mode: code complexity 4 JIRA NVGPU-3581 Change-Id: I70d79d98e7beb13fcee578ea4ac6112096b8933d Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2178751 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -111,38 +111,13 @@ static int nvgpu_gr_obj_ctx_init_ctxsw_preemption_mode(struct gk20a *g,
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return 0;
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}
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int nvgpu_gr_obj_ctx_set_ctxsw_preemption_mode(struct gk20a *g,
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static int nvgpu_gr_obj_ctx_set_graphics_preemption_mode(struct gk20a *g,
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struct nvgpu_gr_config *config, struct nvgpu_gr_ctx_desc *gr_ctx_desc,
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struct nvgpu_gr_ctx *gr_ctx, struct vm_gk20a *vm, u32 class_num,
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u32 graphics_preempt_mode, u32 compute_preempt_mode)
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struct nvgpu_gr_ctx *gr_ctx, struct vm_gk20a *vm,
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u32 graphics_preempt_mode)
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{
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int err = 0;
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#ifdef CONFIG_NVGPU_GRAPHICS
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if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP)) {
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return 0;
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}
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if (g->ops.gpu_class.is_valid_gfx(class_num) &&
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nvgpu_gr_ctx_desc_force_preemption_gfxp(gr_ctx_desc)) {
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graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP;
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}
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#endif
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#ifdef CONFIG_NVGPU_CILP
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if (g->ops.gpu_class.is_valid_compute(class_num) &&
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nvgpu_gr_ctx_desc_force_preemption_cilp(gr_ctx_desc)) {
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compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP;
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}
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#endif
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/* check for invalid combinations */
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if (nvgpu_gr_ctx_check_valid_preemption_mode(gr_ctx,
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graphics_preempt_mode, compute_preempt_mode) == false) {
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err = -EINVAL;
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goto fail;
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}
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/* set preemption modes */
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switch (graphics_preempt_mode) {
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#ifdef CONFIG_NVGPU_GRAPHICS
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@@ -198,6 +173,16 @@ int nvgpu_gr_obj_ctx_set_ctxsw_preemption_mode(struct gk20a *g,
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break;
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}
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#ifdef CONFIG_NVGPU_GRAPHICS
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fail:
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#endif
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return err;
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}
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static int nvgpu_gr_obj_ctx_set_compute_preemption_mode(struct gk20a *g,
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struct nvgpu_gr_ctx *gr_ctx, u32 class_num, u32 compute_preempt_mode)
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{
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if (g->ops.gpu_class.is_valid_compute(class_num) ||
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g->ops.gpu_class.is_valid_gfx(class_num)) {
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switch (compute_preempt_mode) {
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@@ -217,6 +202,52 @@ int nvgpu_gr_obj_ctx_set_ctxsw_preemption_mode(struct gk20a *g,
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}
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return 0;
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}
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int nvgpu_gr_obj_ctx_set_ctxsw_preemption_mode(struct gk20a *g,
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struct nvgpu_gr_config *config, struct nvgpu_gr_ctx_desc *gr_ctx_desc,
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struct nvgpu_gr_ctx *gr_ctx, struct vm_gk20a *vm, u32 class_num,
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u32 graphics_preempt_mode, u32 compute_preempt_mode)
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{
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int err = 0;
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#ifdef CONFIG_NVGPU_GRAPHICS
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if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP)) {
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return 0;
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}
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if (g->ops.gpu_class.is_valid_gfx(class_num) &&
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nvgpu_gr_ctx_desc_force_preemption_gfxp(gr_ctx_desc)) {
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graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP;
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}
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#endif
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#ifdef CONFIG_NVGPU_CILP
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if (g->ops.gpu_class.is_valid_compute(class_num) &&
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nvgpu_gr_ctx_desc_force_preemption_cilp(gr_ctx_desc)) {
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compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CILP;
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}
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#endif
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/* check for invalid combinations */
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if (nvgpu_gr_ctx_check_valid_preemption_mode(gr_ctx,
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graphics_preempt_mode, compute_preempt_mode) == false) {
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err = -EINVAL;
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goto fail;
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}
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err = nvgpu_gr_obj_ctx_set_graphics_preemption_mode(g, config,
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gr_ctx_desc, gr_ctx, vm, graphics_preempt_mode);
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if (err != 0) {
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goto fail;
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}
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err = nvgpu_gr_obj_ctx_set_compute_preemption_mode(g, gr_ctx,
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class_num, compute_preempt_mode);
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fail:
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return err;
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