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gpu: nvgpu: add FBP index conversion infra for MIG
Add a mapping between local ids and logical ids for FBPs. This is enabled to support conversion for FBP local ids to logical ids when memory partition is enabled for SMC. Bug 200712091 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Change-Id: Iba33327a98bf427b21f37cbf7f2d5ee5619e7ae5 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2651964 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> GVS: Gerrit_Virtual_Submit
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@@ -758,6 +758,65 @@ u32 nvgpu_grmgr_get_fbp_en_mask(struct gk20a *g, u32 gpu_instance_id)
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return U32_MAX;
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}
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u32 nvgpu_grmgr_get_fbp_logical_id(struct gk20a *g, u32 gr_instance_id,
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u32 fbp_local_id)
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{
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struct nvgpu_gpu_instance *gpu_instance;
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u32 gpu_instance_id = nvgpu_grmgr_get_gpu_instance_id(
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g, gr_instance_id);
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if (gpu_instance_id >= g->mig.num_gpu_instances) {
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nvgpu_err(g,
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"gpu_instance_id[%u] >= g->mig.num_gpu_instances[%u]",
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fbp_local_id, g->mig.num_gpu_instances);
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nvgpu_assert(gpu_instance_id >= g->mig.num_gpu_instances);
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return U32_MAX;
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}
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gpu_instance = &g->mig.gpu_instance[gpu_instance_id];
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if (fbp_local_id < gpu_instance->num_fbp) {
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nvgpu_log(g, gpu_dbg_mig,
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"gpu_instance_id[%u], fbp_local_id[%u], fbp_physical_id[%u]",
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gpu_instance->gpu_instance_id, fbp_local_id,
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gpu_instance->fbp_mappings[fbp_local_id]);
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return gpu_instance->fbp_mappings[fbp_local_id];
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} else {
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nvgpu_err(g,
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"fbp_local_id[%u] >= gpu_instance->num_fbp[%u]",
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fbp_local_id, gpu_instance->num_fbp);
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nvgpu_assert(fbp_local_id >= gpu_instance->num_fbp);
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return U32_MAX;
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}
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}
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bool nvgpu_grmgr_get_memory_partition_support_status(struct gk20a *g,
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u32 gr_instance_id)
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{
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struct nvgpu_gpu_instance *gpu_instance;
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u32 gpu_instance_id = nvgpu_grmgr_get_gpu_instance_id(
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g, gr_instance_id);
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if (gpu_instance_id >= g->mig.num_gpu_instances) {
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nvgpu_err(g,
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"gpu_instance_id[%u] >= g->mig.num_gpu_instances[%u]",
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gpu_instance_id, g->mig.num_gpu_instances);
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nvgpu_assert(gpu_instance_id >= g->mig.num_gpu_instances);
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return false;
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}
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gpu_instance = &g->mig.gpu_instance[gpu_instance_id];
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return gpu_instance->is_memory_partition_supported;
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}
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u32 *nvgpu_grmgr_get_fbp_l2_en_mask(struct gk20a *g, u32 gpu_instance_id)
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{
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struct nvgpu_gpu_instance *gpu_instance;
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@@ -223,8 +223,9 @@ static int calculate_new_offsets_for_perf_fbp_chiplets(struct gk20a *g,
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struct nvgpu_dbg_reg_op *op, u32 reg_chiplet_base, u32 chiplet_offset)
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{
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int ret = 0;
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u32 fbp_local_index;
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u32 fbp_local_index, fbp_logical_index;
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u32 gr_instance_id;
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u32 new_offset;
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nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg, " ");
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@@ -242,13 +243,30 @@ static int calculate_new_offsets_for_perf_fbp_chiplets(struct gk20a *g,
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* Obtain new offset.
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*/
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/* At present, FBP indexes doesn't need conversion */
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if (fbp_local_index >= nvgpu_grmgr_get_gr_num_fbps(g, gr_instance_id)) {
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ret = -EINVAL;
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nvgpu_err(g, "Invalid FBP Index");
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return ret;
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}
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/* At present, FBP indexes doesn't need conversion */
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if (nvgpu_grmgr_get_memory_partition_support_status(g, gr_instance_id)) {
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fbp_logical_index = nvgpu_grmgr_get_fbp_logical_id(g,
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gr_instance_id, fbp_local_index);
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new_offset = nvgpu_safe_sub_u32(op->offset,
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nvgpu_safe_mult_u32(fbp_local_index, chiplet_offset));
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new_offset = nvgpu_safe_add_u32(new_offset,
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nvgpu_safe_mult_u32(fbp_logical_index, chiplet_offset));
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nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg,
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"old offset: 0x%08x, new offset = 0x%08x, Local index = %u, logical index = %u",
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op->offset, new_offset, fbp_local_index, fbp_logical_index);
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op->offset = new_offset;
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}
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return 0;
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}
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@@ -574,11 +574,18 @@ static int ga10b_grmgr_get_gpu_instance(struct gk20a *g,
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}
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if (gpu_instance[index].is_memory_partition_supported == false) {
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u32 tmp_fbp_index = 0;
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gpu_instance[index].num_fbp = g->mig.gpu_instance[0].num_fbp;
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gpu_instance[index].fbp_en_mask = g->mig.gpu_instance[0].fbp_en_mask;
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nvgpu_memcpy((u8 *)gpu_instance[index].fbp_l2_en_mask,
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(u8 *)g->mig.gpu_instance[0].fbp_l2_en_mask,
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nvgpu_safe_mult_u64(max_fbps_count, sizeof(u32)));
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while (tmp_fbp_index < gpu_instance[index].num_fbp) {
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gpu_instance[index].fbp_mappings[tmp_fbp_index] = tmp_fbp_index;
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tmp_fbp_index = nvgpu_safe_add_u32(tmp_fbp_index, 1U);
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}
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} else {
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/* SMC Memory partition is not yet supported */
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nvgpu_assert(
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@@ -67,7 +67,11 @@ u32 nvgpu_grmgr_get_gr_logical_gpc_mask(struct gk20a *g, u32 gr_instance_id);
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u32 nvgpu_grmgr_get_gr_physical_gpc_mask(struct gk20a *g, u32 gr_instance_id);
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u32 nvgpu_grmgr_get_num_fbps(struct gk20a *g, u32 gpu_instance_id);
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u32 nvgpu_grmgr_get_fbp_en_mask(struct gk20a *g, u32 gpu_instance_id);
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u32 nvgpu_grmgr_get_fbp_logical_id(struct gk20a *g, u32 gr_instance_id,
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u32 fbp_local_id);
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u32 *nvgpu_grmgr_get_fbp_l2_en_mask(struct gk20a *g, u32 gpu_instance_id);
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bool nvgpu_grmgr_get_memory_partition_support_status(struct gk20a *g,
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u32 gr_instance_id);
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static inline bool nvgpu_grmgr_is_mig_type_gpu_instance(
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struct nvgpu_gpu_instance *gpu_instance)
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@@ -47,6 +47,9 @@
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/** Maximum number of GPC count. */
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#define NVGPU_MIG_MAX_GPCS 32U
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/** Maximum number of FBP count. */
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#define NVGPU_MIG_MAX_FBPS 12U
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/** Enumerated type used to identify various gpu instance types */
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enum nvgpu_mig_gpu_instance_type {
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NVGPU_MIG_TYPE_PHYSICAL = 0,
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@@ -117,7 +120,7 @@ struct nvgpu_gpu_instance {
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* it is not available.
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* For Legacy and MIG, it currently represents physical FBP mask.
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* [TODO]: When SMC memory partition will be enabled, a mapping should
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* be created for local to {logical, physical}.
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* be created for local to physical.
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*/
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u32 fbp_en_mask;
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/**
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@@ -127,6 +130,11 @@ struct nvgpu_gpu_instance {
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* be created for local to {logical, physical}.
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*/
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u32 *fbp_l2_en_mask;
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/* Array to hold the logical Ids of the fbp corresponding to the local Ids
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*/
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u32 fbp_mappings[NVGPU_MIG_MAX_FBPS];
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/** Memory area to store h/w CE engine ids. */
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const struct nvgpu_device *lce_devs[NVGPU_MIG_MAX_ENGINES];
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/* Flag to indicate whether memory partition is supported or not. */
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