gpu: nvgpu: nvlink: Add HAL to get link_mask

VBIOS link_disable_mask should be sufficient to find the connected
links. As VBIOS is not updated with correct mask, we parse the DT
node where we hardcode the link_id. DT method is not scalable as same
DT node is used for different dGPUs connected over PCIE. Remove the
DT parsing of link id and use HAL to get link_mask based on the GPU.

JIRA NVLINK-162

Change-Id: Idb7b639962928ce48711a0d7fc277c4c324bee91
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1738967
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Tejal Kudav
2018-06-04 13:15:28 +05:30
parent a3356b8ad7
commit 118b7fb891
5 changed files with 25 additions and 6 deletions

View File

@@ -28,7 +28,6 @@ int nvgpu_nvlink_read_dt_props(struct gk20a *g)
u32 local_link_id;
u32 remote_dev_id;
u32 remote_link_id;
u32 physical_link;
bool is_master;
/* Parse DT */
@@ -49,7 +48,6 @@ int nvgpu_nvlink_read_dt_props(struct gk20a *g)
of_property_read_u32(np, "local_link_id", &local_link_id);
of_property_read_u32(np, "remote_dev_id", &remote_dev_id);
of_property_read_u32(np, "remote_link_id", &remote_link_id);
of_property_read_u32(np, "physical_link", &physical_link);
is_master = of_property_read_bool(np, "is_master");
/* Check that we are in dGPU mode */
@@ -64,7 +62,6 @@ int nvgpu_nvlink_read_dt_props(struct gk20a *g)
ndev->link.remote_dev_info.device_id = remote_dev_id;
ndev->link.remote_dev_info.link_id = remote_link_id;
g->nvlink.connected_links = BIT(physical_link);
return 0;
fail:

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@@ -1200,6 +1200,7 @@ struct gpu_ops {
int (*setup_pll)(struct gk20a *g, unsigned long link_mask);
int (*minion_data_ready_en)(struct gk20a *g,
unsigned long link_mask, bool sync);
void (*get_connected_link_mask)(u32 *link_mask);
/* API */
int (*link_early_init)(struct gk20a *g, unsigned long mask);
u32 (*link_get_mode)(struct gk20a *g, u32 link_id);

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@@ -843,6 +843,7 @@ static const struct gpu_ops gv100_ops = {
.rxdet = NULL,
.setup_pll = gv100_nvlink_setup_pll,
.minion_data_ready_en = gv100_nvlink_minion_data_ready_en,
.get_connected_link_mask = gv100_nvlink_get_connected_link_mask,
/* API */
.link_early_init = gv100_nvlink_link_early_init,
.link_get_state = gv100_nvlink_link_get_state,

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@@ -2696,6 +2696,13 @@ u32 gv100_nvlink_link_get_rx_sublink_state(struct gk20a *g, u32 link_id)
return nvl_sl1_slsm_status_rx_primary_state_v(reg);
}
/* Hardcode the link_mask while we wait for VBIOS link_disable_mask field
* to be updated.
*/
void gv100_nvlink_get_connected_link_mask(u32 *link_mask)
{
*link_mask = GV100_CONNECTED_LINK_MASK;
}
/*
* Performs nvlink device level initialization by discovering the topology
* taking device out of reset, boot minion, set clocks up and common interrupts
@@ -2735,10 +2742,20 @@ int gv100_nvlink_early_init(struct gk20a *g)
/* Links in reset should be removed from initialized link sw state */
g->nvlink.initialized_links &= __gv100_nvlink_get_link_reset_mask(g);
nvgpu_log(g, gpu_dbg_nvlink, "connected_links = 0x%08x (from DT)",
g->nvlink.connected_links);
/* VBIOS link_disable_mask should be sufficient to find the connected
* links. As VBIOS is not updated with correct mask, we parse the DT
* node where we hardcode the link_id. DT method is not scalable as same
* DT node is used for different dGPUs connected over PCIE.
* Remove the DT parsing of link id and use HAL to get link_mask based
* on the GPU. This is temporary WAR while we get the VBIOS updated with
* correct mask.
*/
g->ops.nvlink.get_connected_link_mask(&(g->nvlink.connected_links));
/* Track unconnected links */
nvgpu_log(g, gpu_dbg_nvlink, "connected_links = 0x%08x",
g->nvlink.connected_links);
/* Track only connected links */
g->nvlink.discovered_links &= g->nvlink.connected_links;
nvgpu_log(g, gpu_dbg_nvlink, "discovered_links = 0x%08x (combination)",

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@@ -23,6 +23,8 @@
#ifndef NVGPU_NVLINK_GV100_H
#define NVGPU_NVLINK_GV100_H
#define GV100_CONNECTED_LINK_MASK 0x8
struct gk20a;
int gv100_nvlink_discover_ioctrl(struct gk20a *g);
@@ -34,6 +36,7 @@ int gv100_nvlink_minion_send_command(struct gk20a *g, u32 link_id, u32 command,
int gv100_nvlink_setup_pll(struct gk20a *g, unsigned long link_mask);
int gv100_nvlink_minion_data_ready_en(struct gk20a *g,
unsigned long link_mask, bool sync);
void gv100_nvlink_get_connected_link_mask(u32 *link_mask);
/* API */
int gv100_nvlink_link_early_init(struct gk20a *g, unsigned long mask);
u32 gv100_nvlink_link_get_mode(struct gk20a *g, u32 link_id);