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gpu: nvgpu: nvlink: Add HAL to get link_mask
VBIOS link_disable_mask should be sufficient to find the connected links. As VBIOS is not updated with correct mask, we parse the DT node where we hardcode the link_id. DT method is not scalable as same DT node is used for different dGPUs connected over PCIE. Remove the DT parsing of link id and use HAL to get link_mask based on the GPU. JIRA NVLINK-162 Change-Id: Idb7b639962928ce48711a0d7fc277c4c324bee91 Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1738967 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -28,7 +28,6 @@ int nvgpu_nvlink_read_dt_props(struct gk20a *g)
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u32 local_link_id;
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u32 remote_dev_id;
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u32 remote_link_id;
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u32 physical_link;
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bool is_master;
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/* Parse DT */
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@@ -49,7 +48,6 @@ int nvgpu_nvlink_read_dt_props(struct gk20a *g)
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of_property_read_u32(np, "local_link_id", &local_link_id);
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of_property_read_u32(np, "remote_dev_id", &remote_dev_id);
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of_property_read_u32(np, "remote_link_id", &remote_link_id);
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of_property_read_u32(np, "physical_link", &physical_link);
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is_master = of_property_read_bool(np, "is_master");
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/* Check that we are in dGPU mode */
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@@ -64,7 +62,6 @@ int nvgpu_nvlink_read_dt_props(struct gk20a *g)
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ndev->link.remote_dev_info.device_id = remote_dev_id;
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ndev->link.remote_dev_info.link_id = remote_link_id;
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g->nvlink.connected_links = BIT(physical_link);
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return 0;
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fail:
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@@ -1200,6 +1200,7 @@ struct gpu_ops {
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int (*setup_pll)(struct gk20a *g, unsigned long link_mask);
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int (*minion_data_ready_en)(struct gk20a *g,
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unsigned long link_mask, bool sync);
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void (*get_connected_link_mask)(u32 *link_mask);
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/* API */
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int (*link_early_init)(struct gk20a *g, unsigned long mask);
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u32 (*link_get_mode)(struct gk20a *g, u32 link_id);
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@@ -843,6 +843,7 @@ static const struct gpu_ops gv100_ops = {
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.rxdet = NULL,
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.setup_pll = gv100_nvlink_setup_pll,
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.minion_data_ready_en = gv100_nvlink_minion_data_ready_en,
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.get_connected_link_mask = gv100_nvlink_get_connected_link_mask,
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/* API */
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.link_early_init = gv100_nvlink_link_early_init,
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.link_get_state = gv100_nvlink_link_get_state,
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@@ -2696,6 +2696,13 @@ u32 gv100_nvlink_link_get_rx_sublink_state(struct gk20a *g, u32 link_id)
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return nvl_sl1_slsm_status_rx_primary_state_v(reg);
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}
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/* Hardcode the link_mask while we wait for VBIOS link_disable_mask field
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* to be updated.
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*/
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void gv100_nvlink_get_connected_link_mask(u32 *link_mask)
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{
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*link_mask = GV100_CONNECTED_LINK_MASK;
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}
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/*
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* Performs nvlink device level initialization by discovering the topology
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* taking device out of reset, boot minion, set clocks up and common interrupts
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@@ -2735,10 +2742,20 @@ int gv100_nvlink_early_init(struct gk20a *g)
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/* Links in reset should be removed from initialized link sw state */
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g->nvlink.initialized_links &= __gv100_nvlink_get_link_reset_mask(g);
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nvgpu_log(g, gpu_dbg_nvlink, "connected_links = 0x%08x (from DT)",
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g->nvlink.connected_links);
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/* VBIOS link_disable_mask should be sufficient to find the connected
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* links. As VBIOS is not updated with correct mask, we parse the DT
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* node where we hardcode the link_id. DT method is not scalable as same
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* DT node is used for different dGPUs connected over PCIE.
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* Remove the DT parsing of link id and use HAL to get link_mask based
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* on the GPU. This is temporary WAR while we get the VBIOS updated with
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* correct mask.
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*/
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g->ops.nvlink.get_connected_link_mask(&(g->nvlink.connected_links));
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/* Track unconnected links */
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nvgpu_log(g, gpu_dbg_nvlink, "connected_links = 0x%08x",
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g->nvlink.connected_links);
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/* Track only connected links */
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g->nvlink.discovered_links &= g->nvlink.connected_links;
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nvgpu_log(g, gpu_dbg_nvlink, "discovered_links = 0x%08x (combination)",
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@@ -23,6 +23,8 @@
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#ifndef NVGPU_NVLINK_GV100_H
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#define NVGPU_NVLINK_GV100_H
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#define GV100_CONNECTED_LINK_MASK 0x8
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struct gk20a;
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int gv100_nvlink_discover_ioctrl(struct gk20a *g);
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@@ -34,6 +36,7 @@ int gv100_nvlink_minion_send_command(struct gk20a *g, u32 link_id, u32 command,
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int gv100_nvlink_setup_pll(struct gk20a *g, unsigned long link_mask);
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int gv100_nvlink_minion_data_ready_en(struct gk20a *g,
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unsigned long link_mask, bool sync);
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void gv100_nvlink_get_connected_link_mask(u32 *link_mask);
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/* API */
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int gv100_nvlink_link_early_init(struct gk20a *g, unsigned long mask);
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u32 gv100_nvlink_link_get_mode(struct gk20a *g, u32 link_id);
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