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gpu: nvgpu: posix: whitelist built-in atomic ops certc violations
Whitelist the following CERT-C INT31-C, DCL37-C and EXP47-C violations from atomic.h reported due to an issue in the Coverity scanner tool (version 2019.06). Violations: 1. cert_int31_c_violation: Casting "__atomic_fetch_sub_4(&v->v, i, 5)" from "unsigned int" to "int" without checking its value may result in lost or misinterpreted data. 2. cert_int31_c_violation: Casting "i" from "int" to "unsigned int" without checking its value may result in lost or misinterpreted data. 3. cert_exp37_c_violation: Calling function "__atomic_fetch_add_4(void volatile *, unsigned int, int)" with the argument "i", which has an incompatible type "int" instead of "unsigned int". 4. cert_dcl37_c_violation: The reserved identifier "__atomic_load_ptr", which is reserved for use as identifiers with file scope in both the ordinary and tag name spaces, is declared. Bug 200584380 JIRA NVGPU-4480 Change-Id: I9eebcca734f7081f9ca759c955e50a777e1ff25a Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279933 Reviewed-by: Philip Elcan <pelcan@nvidia.com> Reviewed-by: Ajesh K V <akv@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
6acd7924c5
commit
11b7e12b7d
@@ -27,6 +27,7 @@
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#include <nvgpu/types.h>
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#include <nvgpu/static_analysis.h>
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#include <nvgpu/utils.h>
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#include <nvgpu/cov_whitelist.h>
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/*
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* Note: this code uses the GCC builtins to implement atomics.
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@@ -66,14 +67,28 @@ typedef struct __nvgpu_posix_atomic64 {
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* @param v Atomic variable to be set.
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* @param i Value to set in atomic variable.
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*/
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#define NVGPU_POSIX_ATOMIC_SET(v, i) atomic_store(&((v)->v), (i))
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#define NVGPU_POSIX_ATOMIC_SET(v, i) \
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(DCL37_C), "Bug 200584380") \
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(EXP37_C), "Bug 200584380") \
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atomic_store(&((v)->v), (i)) \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(DCL37_C)) \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(EXP37_C))
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/**
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* @brief Define for atomic read.
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*
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* @param v Atomic variable to be read.
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*/
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#define NVGPU_POSIX_ATOMIC_READ(v) atomic_load(&((v)->v))
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#define NVGPU_POSIX_ATOMIC_READ(v) \
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(DCL37_C), "Bug 200584380") \
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(EXP37_C), "Bug 200584380") \
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atomic_load(&((v)->v)) \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(DCL37_C)) \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(EXP37_C))
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/**
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* @brief Define for atomic add and return.
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@@ -87,7 +102,16 @@ typedef struct __nvgpu_posix_atomic64 {
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({ \
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typeof((v)->v) tmp; \
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\
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(INT31_C), "Bug 200584380") \
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(DCL37_C), "Bug 200584380") \
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(EXP37_C), "Bug 200584380") \
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tmp = (typeof((v)->v))atomic_fetch_add(&((v)->v), (i)); \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(INT31_C)) \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(DCL37_C)) \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(EXP37_C)) \
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tmp = __builtin_choose_expr( \
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IS_SIGNED_LONG_TYPE(i), \
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(nvgpu_safe_add_s64((tmp), (i))), \
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@@ -107,7 +131,16 @@ typedef struct __nvgpu_posix_atomic64 {
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({ \
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typeof((v)->v) tmp; \
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\
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(INT31_C), "Bug 200584380") \
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(DCL37_C), "Bug 200584380") \
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(EXP37_C), "Bug 200584380") \
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tmp = (typeof((v)->v))atomic_fetch_sub(&((v)->v), (i)); \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(INT31_C)) \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(DCL37_C)) \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(EXP37_C)) \
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tmp = __builtin_choose_expr( \
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IS_SIGNED_LONG_TYPE(i), \
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(nvgpu_safe_sub_s64((tmp), (i))), \
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@@ -130,7 +163,13 @@ typedef struct __nvgpu_posix_atomic64 {
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({ \
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typeof((v)->v) tmp = (old); \
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\
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(DCL37_C), "Bug 200584380") \
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(EXP37_C), "Bug 200584380") \
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atomic_compare_exchange_strong(&((v)->v), &tmp, (new)); \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(DCL37_C)) \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(EXP37_C)) \
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tmp; \
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})
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@@ -142,7 +181,14 @@ typedef struct __nvgpu_posix_atomic64 {
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*
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* @return Original value in the atomic variable.
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*/
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#define NVGPU_POSIX_ATOMIC_XCHG(v, new) atomic_exchange(&((v)->v), (new))
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#define NVGPU_POSIX_ATOMIC_XCHG(v, new) \
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(DCL37_C), "Bug 200584380") \
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(EXP37_C), "Bug 200584380") \
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atomic_exchange(&((v)->v), (new)) \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(DCL37_C)) \
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(EXP37_C))
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/**
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* @brief POSIX implementation of atomic set.
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@@ -379,7 +425,10 @@ static inline int nvgpu_atomic_add_unless_impl(nvgpu_atomic_t *v, int a, int u)
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if (old == (u)) {
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break;
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}
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(DCL37_C), "Bug 200584380")
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} while (!atomic_compare_exchange_strong(&((v)->v), &old, old + (a)));
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(DCL37_C))
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return old;
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}
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@@ -460,7 +509,10 @@ static inline long nvgpu_atomic64_add_unless_impl(nvgpu_atomic64_t *v, long a,
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if (old == (u)) {
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break;
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}
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NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, \
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NVGPU_CERT(DCL37_C), "Bug 200584380")
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} while (!atomic_compare_exchange_strong(&((v)->v), &old, old + (a)));
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NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_CERT(DCL37_C))
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return old;
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}
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