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gpu: nvgpu: isolate common & hal falcon_set_irq functions
nvgpu_falcon_set_irq should handle interrupts state. gk20a_falcon_set_irq is supposed to be hal API that will enable/disable the falcon interrupts. JIRA NVGPU-1459 Change-Id: I2c97a7c1fd5cc0a5d11d80f62bca5aaa66f3b3c9 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2015591 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -140,19 +140,28 @@ void nvgpu_falcon_set_irq(struct nvgpu_falcon *flcn, bool enable,
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u32 intr_mask, u32 intr_dest)
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u32 intr_mask, u32 intr_dest)
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{
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{
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struct nvgpu_falcon_ops *flcn_ops;
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struct nvgpu_falcon_ops *flcn_ops;
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struct gk20a *g;
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if (flcn == NULL) {
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if (flcn == NULL) {
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return;
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return;
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}
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}
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g = flcn->g;
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flcn_ops = &flcn->flcn_ops;
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flcn_ops = &flcn->flcn_ops;
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if (flcn_ops->set_irq != NULL) {
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if (flcn_ops->set_irq == NULL) {
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flcn_ops->set_irq(flcn, enable, intr_mask, intr_dest);
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nvgpu_warn(g, "Invalid op on falcon 0x%x ", flcn->flcn_id);
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} else {
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return;
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nvgpu_warn(flcn->g, "Invalid op on falcon 0x%x ",
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flcn->flcn_id);
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}
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}
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if (!flcn->is_interrupt_enabled) {
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nvgpu_warn(g, "Interrupt not supported on flcn 0x%x ",
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flcn->flcn_id);
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/* Keep interrupt disabled */
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enable = false;
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}
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flcn_ops->set_irq(flcn, enable, intr_mask, intr_dest);
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}
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}
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int nvgpu_falcon_wait_for_halt(struct nvgpu_falcon *flcn, unsigned int timeout)
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int nvgpu_falcon_wait_for_halt(struct nvgpu_falcon *flcn, unsigned int timeout)
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@@ -68,13 +68,6 @@ static void gk20a_falcon_set_irq(struct nvgpu_falcon *flcn, bool enable,
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struct gk20a *g = flcn->g;
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struct gk20a *g = flcn->g;
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u32 base_addr = flcn->flcn_base;
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u32 base_addr = flcn->flcn_base;
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if (!flcn->is_interrupt_enabled) {
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nvgpu_warn(g, "Interrupt not supported on flcn 0x%x ",
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flcn->flcn_id);
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/* Keep interrupt disabled */
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enable = false;
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}
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if (enable) {
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if (enable) {
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gk20a_writel(g, base_addr + falcon_falcon_irqmset_r(),
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gk20a_writel(g, base_addr + falcon_falcon_irqmset_r(),
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intr_mask);
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intr_mask);
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