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gpu: nvgpu: Add NULL checks for therm HALs

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Add NULL checks for therm HALs

JIRA NVGPU-9495

Change-Id: If4fd1166c11070a978546e701157d2a217008e39
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2844938
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Tested-by: Rajesh Devaraj <rdevaraj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Divya
2023-01-17 13:43:07 +00:00
committed by mobile promotions
parent 0c1fc6bcde
commit 120f9e40a3
1 changed files with 7 additions and 2 deletions
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9
drivers/gpu/nvgpu/common/power_features/cg/cg.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -33,6 +33,11 @@ static void nvgpu_cg_set_mode(struct gk20a *g, u32 cgmode, u32 mode_config)
const struct nvgpu_device *dev = NULL;
struct nvgpu_fifo *f = &g->fifo;
if ((g->ops.therm.init_blcg_mode == NULL) &&
(g->ops.therm.init_elcg_mode == NULL)) {
return;
}
nvgpu_log_fn(g, " ");
for (n = 0; n < f->num_engines; n++) {
@@ -41,7 +46,7 @@ static void nvgpu_cg_set_mode(struct gk20a *g, u32 cgmode, u32 mode_config)
#ifdef CONFIG_NVGPU_NON_FUSA
/* gr_engine supports both BLCG and ELCG */
if ((cgmode == BLCG_MODE) &&
(dev->type == NVGPU_DEVTYPE_GRAPHICS)) {
(dev->type == NVGPU_DEVTYPE_GRAPHICS)) {
g->ops.therm.init_blcg_mode(g, (u32)mode_config,
engine_id);
break;