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gpu: nvgpu: Add api to query the availability of multi GR support
* Added a new api(nvgpu_gr_is_multi_gr_enabled()) to query the availability of multi GR support when MIG is enabled. JIRA NVGPU-5650 Change-Id: I3f8c29db966afb8d72021a093e009492f134ec9d Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2488399 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Dinesh T <dt@nvidia.com> Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
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@@ -1,7 +1,7 @@
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/*
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* GR MANAGER
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*
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* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -170,7 +170,7 @@ int nvgpu_grmgr_config_gr_remap_window(struct gk20a *g,
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{
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int err = 0;
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#if defined(CONFIG_NVGPU_NEXT) && defined(CONFIG_NVGPU_MIG)
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) {
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if (nvgpu_grmgr_is_multi_gr_enabled(g)) {
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/*
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* GR remap window enable/disable sequence for a GR
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* SYSPIPE PGRAPH programming:
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@@ -301,7 +301,7 @@ static inline u32 nvgpu_grmgr_get_gpu_instance_id(struct gk20a *g,
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{
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u32 gpu_instance_id = 0U;
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) {
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if (nvgpu_grmgr_is_multi_gr_enabled(g)) {
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/* 0th entry is physical device gpu instance */
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gpu_instance_id = nvgpu_safe_add_u32(gr_instance_id, 1U);
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@@ -366,7 +366,7 @@ u32 nvgpu_grmgr_get_gr_instance_id(struct gk20a *g, u32 gpu_instance_id)
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u32 gr_instance_id = 0U;
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/* TODO : Add gr_instance_id for physical device when MIG is enabled. */
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if ((nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) &&
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if ((nvgpu_grmgr_is_multi_gr_enabled(g)) &&
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(gpu_instance_id != 0U)) {
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if (gpu_instance_id < g->mig.num_gpu_instances) {
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/* 0th entry is physical device gpu instance */
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@@ -446,7 +446,7 @@ u32 nvgpu_grmgr_get_gpu_instance_runlist_id(struct gk20a *g,
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u32 nvgpu_grmgr_get_gr_instance_id_for_syspipe(struct gk20a *g,
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u32 gr_syspipe_id)
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{
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) {
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if (nvgpu_grmgr_is_multi_gr_enabled(g)) {
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u32 gr_instance_id = 0U;
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u32 index;
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/* 0th entry is physical device gpu instance. */
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -32,7 +32,7 @@
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#define nvgpu_gr_get_cur_instance_id(g) \
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({ \
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u32 current_gr_instance_id = 0U; \
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) { \
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if (nvgpu_grmgr_is_multi_gr_enabled(g)) { \
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if (nvgpu_mutex_tryacquire(&g->mig.gr_syspipe_lock) == 0) { \
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current_gr_instance_id = g->mig.cur_gr_instance; \
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} else { \
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@@ -54,7 +54,7 @@
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#ifdef CONFIG_NVGPU_MIG
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#define nvgpu_gr_exec_for_each_instance(g, func) \
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({ \
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) { \
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if (nvgpu_grmgr_is_multi_gr_enabled(g)) { \
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u32 gr_instance_id = 0U; \
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for (; gr_instance_id < g->num_gr_instances; gr_instance_id++) { \
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u32 gr_syspipe_id = nvgpu_gr_get_syspipe_id(g, gr_instance_id); \
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@@ -75,7 +75,7 @@
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#define nvgpu_gr_exec_with_ret_for_each_instance(g, func) \
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({ \
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int err = 0; \
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) { \
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if (nvgpu_grmgr_is_multi_gr_enabled(g)) { \
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u32 gr_instance_id = 0U; \
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for (; gr_instance_id < g->num_gr_instances; gr_instance_id++) { \
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u32 gr_syspipe_id = nvgpu_gr_get_syspipe_id(g, gr_instance_id); \
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@@ -99,7 +99,7 @@
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#ifdef CONFIG_NVGPU_MIG
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#define nvgpu_gr_exec_for_all_instances(g, func) \
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({ \
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) { \
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if (nvgpu_grmgr_is_multi_gr_enabled(g)) { \
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nvgpu_grmgr_config_gr_remap_window(g, NVGPU_MIG_INVALID_GR_SYSPIPE_ID, false); \
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g->mig.cur_gr_instance = 0; \
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(func); \
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@@ -115,7 +115,7 @@
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#ifdef CONFIG_NVGPU_MIG
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#define nvgpu_gr_exec_for_instance(g, gr_instance_id, func) \
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({ \
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) { \
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if (nvgpu_grmgr_is_multi_gr_enabled(g)) { \
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u32 gr_syspipe_id = nvgpu_gr_get_syspipe_id(g, \
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gr_instance_id); \
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nvgpu_grmgr_config_gr_remap_window(g, gr_syspipe_id, \
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@@ -136,7 +136,7 @@
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#define nvgpu_gr_exec_with_ret_for_instance(g, gr_instance_id, func, type) \
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({ \
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typeof(type) ret; \
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) { \
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if (nvgpu_grmgr_is_multi_gr_enabled(g)) { \
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u32 gr_syspipe_id = nvgpu_gr_get_syspipe_id(g, gr_instance_id); \
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nvgpu_grmgr_config_gr_remap_window(g, gr_syspipe_id, true); \
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g->mig.cur_gr_instance = gr_instance_id; \
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@@ -168,7 +168,7 @@
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#define nvgpu_gr_get_gpu_instance_config_ptr(g, gpu_instance_id) \
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({ \
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struct nvgpu_gr_config *gr_config = NULL; \
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) { \
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if (nvgpu_grmgr_is_multi_gr_enabled(g)) { \
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u32 gr_instance_id = nvgpu_grmgr_get_gr_instance_id(g, \
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gpu_instance_id); \
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if (gr_instance_id < g->num_gr_instances) { \
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@@ -1,7 +1,7 @@
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/*
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* GR MANAGER
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*
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* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -27,6 +27,8 @@
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#include <nvgpu/types.h>
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#include <nvgpu/mig.h>
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#include <nvgpu/enabled.h>
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#include <nvgpu/gk20a.h>
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struct gk20a;
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@@ -57,4 +59,10 @@ static inline bool nvgpu_grmgr_is_mig_type_gpu_instance(
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return (gpu_instance->gpu_instance_type == NVGPU_MIG_TYPE_MIG);
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}
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static inline bool nvgpu_grmgr_is_multi_gr_enabled(struct gk20a *g)
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{
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return ((nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) &&
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(g->mig.num_gpu_instances > 1U));
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}
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#endif /* NVGPU_GRMGR_H */
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