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gpu: nvgpu: Remove NVHSCLK coreclk programming

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top_nvhsclk_ctrl_e_clk_core and top_nvhsclk_ctrl_swap_clk_core
default to values 1 and 0 respectively on reset.
We need not explicitly program them to same values.

JIRA NVGPU-966

Change-Id: I71976c73d74cf81184c79ac9a23e01d26c31be42
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1803639
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Tejal Kudav
2018-08-21 13:14:26 +05:30
committed by mobile promotions
parent bfe65407bd
commit 14949fbad6
1 changed files with 0 additions and 4 deletions
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4
drivers/gpu/nvgpu/gv100/nvlink_gv100.c
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@@ -1485,12 +1485,8 @@ int gv100_nvlink_setup_pll(struct gk20a *g, unsigned long link_mask)
reg = set_field(reg, top_nvhsclk_ctrl_e_clk_nvl_m(),
top_nvhsclk_ctrl_e_clk_nvl_f(pad_ctrl));
reg = set_field(reg, top_nvhsclk_ctrl_e_clk_core_m(),
top_nvhsclk_ctrl_e_clk_core_f(0x1));
reg = set_field(reg, top_nvhsclk_ctrl_swap_clk_nvl_m(),
top_nvhsclk_ctrl_swap_clk_nvl_f(swap_ctrl));
reg = set_field(reg, top_nvhsclk_ctrl_swap_clk_core_m(),
top_nvhsclk_ctrl_swap_clk_core_f(0x0));
gk20a_writel(g, top_nvhsclk_ctrl_r(), reg);