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gpu: nvgpu: remove bpmp powergate calls for t186 and t194 and update is_railgated

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With Generic Power Domains (genpd), bpmp driver will manage the GPU
powergating. With the nvgpu idle/unidle flows updated for VPR with
genpd/RPM, the usage of the below tegra bpmp calls can be removed
from nvgpu from railgate APIs for t186 and t194. Note that genpd
is available in k4.14 onwards, so this will work on current
downstream kernel.

tegra_bpmp_running
tegra_powergate_is_powered
tegra_powergate_partition
tegra_unpowergate_partition

Runtime suspended state indicates that the device is railgated.
Update the t186 and t194 is_railgated handlers with this. t210
railgate/unrailgate will be still managed by nvgpu as bpmp
support is not present.

Bug 200602747
JIRA NVGPU-5356

Change-Id: Iadfd794cb51bc41ca927b84fc212ac766d60094d
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2376642
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2020-07-16 23:48:54 +05:30
committed by Alex Waterman
parent bd7bda4f98
commit 17d1ecc43c
2 changed files with 18 additions and 69 deletions
Download Patch File Download Diff File Expand all files Collapse all files

31
drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c
View File

@@ -20,6 +20,7 @@
#include <linux/dma-buf.h>
#include <linux/reset.h>
#include <linux/iommu.h>
#include <linux/pm_runtime.h>
#ifdef CONFIG_TEGRA_BWMGR
#include <linux/platform/tegra/emc_bwmgr.h>
#endif
@@ -28,8 +29,6 @@
#include <uapi/linux/nvgpu.h>
#ifdef CONFIG_NV_TEGRA_BPMP
#include <soc/tegra/tegra_bpmp.h>
#include <soc/tegra/tegra_powergate.h>
#include <soc/tegra/tegra-bpmp-dvfs.h>
#endif /* CONFIG_NV_TEGRA_BPMP */
@@ -261,12 +260,14 @@ static int gp10b_tegra_remove(struct device *dev)
static bool gp10b_tegra_is_railgated(struct device *dev)
{
struct gk20a *g = get_gk20a(dev);
bool ret = false;
#ifdef TEGRA186_POWER_DOMAIN_GPU
if (tegra_bpmp_running())
ret = !tegra_powergate_is_powered(TEGRA186_POWER_DOMAIN_GPU);
#endif
if (pm_runtime_status_suspended(dev)) {
ret = true;
}
nvgpu_log(g, gpu_dbg_info, "railgated? %s", ret ? "yes" : "no");
return ret;
}
@@ -305,17 +306,10 @@ static int gp10b_tegra_railgate(struct device *dev)
tegra_bwmgr_set_emc(
(struct tegra_bwmgr_client *)profile->private_data,
0, TEGRA_BWMGR_SET_EMC_FLOOR);
#endif
#endif /* CONFIG_TEGRA_BWMGR */
#ifdef TEGRA186_POWER_DOMAIN_GPU
if (tegra_bpmp_running() &&
tegra_powergate_is_powered(TEGRA186_POWER_DOMAIN_GPU)) {
gp10b_tegra_clks_control(dev, false);
tegra_powergate_partition(TEGRA186_POWER_DOMAIN_GPU);
}
#else
gp10b_tegra_clks_control(dev, false);
#endif
return 0;
}
@@ -327,14 +321,7 @@ static int gp10b_tegra_unrailgate(struct device *dev)
struct gk20a_scale_profile *profile = platform->g->scale_profile;
#endif
#ifdef TEGRA186_POWER_DOMAIN_GPU
if (tegra_bpmp_running()) {
ret = tegra_unpowergate_partition(TEGRA186_POWER_DOMAIN_GPU);
gp10b_tegra_clks_control(dev, true);
}
#else
gp10b_tegra_clks_control(dev, true);
#endif
#ifdef CONFIG_TEGRA_BWMGR
/* to start with set emc frequency floor to max rate*/

56
drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c
View File

@@ -23,6 +23,7 @@
#include <linux/hashtable.h>
#include <linux/clk.h>
#include <linux/iommu.h>
#include <linux/pm_runtime.h>
#ifdef CONFIG_TEGRA_BWMGR
#include <linux/platform/tegra/emc_bwmgr.h>
#endif
@@ -32,11 +33,6 @@
#include <uapi/linux/nvgpu.h>
#ifdef CONFIG_NV_TEGRA_BPMP
#include <soc/tegra/tegra_bpmp.h>
#include <soc/tegra/tegra_powergate.h>
#endif /* CONFIG_NV_TEGRA_BPMP */
#include "platform_gk20a.h"
#include "clk.h"
#include "scale.h"
@@ -150,19 +146,15 @@ static int gv11b_tegra_remove(struct device *dev)
static bool gv11b_tegra_is_railgated(struct device *dev)
{
bool ret = false;
#ifdef TEGRA194_POWER_DOMAIN_GPU
struct gk20a *g = get_gk20a(dev);
bool ret = false;
if (tegra_bpmp_running()) {
nvgpu_log(g, gpu_dbg_info, "bpmp running");
ret = !tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU);
nvgpu_log(g, gpu_dbg_info, "railgated? %s", ret ? "yes" : "no");
} else {
nvgpu_log(g, gpu_dbg_info, "bpmp not running");
if (pm_runtime_status_suspended(dev)) {
ret = true;
}
#endif
nvgpu_log(g, gpu_dbg_info, "railgated? %s", ret ? "yes" : "no");
return ret;
}
@@ -181,24 +173,10 @@ static int gv11b_tegra_railgate(struct device *dev)
tegra_bwmgr_set_emc(
(struct tegra_bwmgr_client *)profile->private_data,
0, TEGRA_BWMGR_SET_EMC_FLOOR);
#endif
#endif /* CONFIG_TEGRA_BWMGR */
#ifdef TEGRA194_POWER_DOMAIN_GPU
if (tegra_bpmp_running()) {
nvgpu_log(g, gpu_dbg_info, "bpmp running");
if (!tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU)) {
nvgpu_log(g, gpu_dbg_info, "powergate is not powered");
return 0;
}
gp10b_tegra_clks_control(dev, false);
nvgpu_log(g, gpu_dbg_info, "powergate_partition");
tegra_powergate_partition(TEGRA194_POWER_DOMAIN_GPU);
} else {
nvgpu_log(g, gpu_dbg_info, "bpmp not running");
}
#else
gp10b_tegra_clks_control(dev, false);
#endif
return 0;
}
@@ -209,24 +187,8 @@ static int gv11b_tegra_unrailgate(struct device *dev)
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct gk20a_scale_profile *profile = platform->g->scale_profile;
#endif
#ifdef TEGRA194_POWER_DOMAIN_GPU
struct gk20a *g = get_gk20a(dev);
if (tegra_bpmp_running()) {
nvgpu_log(g, gpu_dbg_info, "bpmp running");
ret = tegra_unpowergate_partition(TEGRA194_POWER_DOMAIN_GPU);
if (ret) {
nvgpu_log(g, gpu_dbg_info,
"unpowergate partition failed");
return ret;
}
gp10b_tegra_clks_control(dev, true);
} else {
nvgpu_log(g, gpu_dbg_info, "bpmp not running");
}
#else
gp10b_tegra_clks_control(dev, true);
#endif
#ifdef CONFIG_TEGRA_BWMGR
/* to start with set emc frequency floor to max rate*/