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gpu: nvgpu: init: fix MISRA 13.5 violation

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MISRA Rule 13.5 states that the right hand operand of a logical && or ||
operator shall not have persistent side effects. Update the while loop
in gk20a_wait_for_idle() to comply.

JIRA NVGPU-3318

Change-Id: I3e51361914c298416bab1f2f7500d743ce409c8b
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2114658
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-05-08 10:16:46 -04:00
committed by mobile promotions
parent 2d368d06f4
commit 19d99a7101
1 changed files with 10 additions and 4 deletions
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14
drivers/gpu/nvgpu/common/init/nvgpu_init.c
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@@ -514,15 +514,21 @@ int gk20a_wait_for_idle(struct gk20a *g)
{
int wait_length = 150; /* 3 second overall max wait. */
int target_usage_count = 0;
bool done = false;
if (g == NULL) {
return -ENODEV;
}
while ((nvgpu_atomic_read(&g->usage_count) != target_usage_count)
&& (wait_length-- >= 0)) {
nvgpu_msleep(20);
}
do {
if (nvgpu_atomic_read(&g->usage_count) == target_usage_count) {
done = true;
} else if (wait_length-- < 0) {
done = true;
} else {
nvgpu_msleep(20);
}
} while (!done);
if (wait_length < 0) {
nvgpu_warn(g, "Timed out waiting for idle (%d)!\n",