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gpu: nvgpu: pmu: move rtos init to func ptr

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This moves the nvgpu_pmu_rtos_init() to a HAL function pointer which
makes it consistent with the other init APIs.

JIRA NVGPU-3980

Change-Id: I562e264deaec76f2a45026a07f24d35b291b1930
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2202969
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-09-20 15:23:26 -04:00
committed by Alex Waterman
parent b53ec4731e
commit 19dd64930d
8 changed files with 14 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/gpu/nvgpu/common/init/nvgpu_init.c
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@@ -523,11 +523,13 @@ int nvgpu_finalize_poweron(struct gk20a *g)
#endif
#ifdef CONFIG_NVGPU_LS_PMU
err = nvgpu_pmu_rtos_init(g);
if (err != 0) {
nvgpu_err(g, "failed to init gk20a pmu");
nvgpu_mutex_release(&g->tpc_pg_lock);
goto done;
if (g->ops.pmu.pmu_rtos_init != NULL) {
err = g->ops.pmu.pmu_rtos_init(g);
if (err != 0) {
nvgpu_err(g, "failed to init gk20a pmu");
nvgpu_mutex_release(&g->tpc_pg_lock);
goto done;
}
}
#endif

1
drivers/gpu/nvgpu/hal/init/hal_gm20b.c
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@@ -884,6 +884,7 @@ static const struct gpu_ops gm20b_ops = {
.pmu_pstate_pmu_setup = nvgpu_pmu_pstate_pmu_setup,
.pmu_destroy = nvgpu_pmu_destroy,
.pmu_early_init = nvgpu_pmu_early_init,
.pmu_rtos_init = nvgpu_pmu_rtos_init,
.is_pmu_supported = gm20b_is_pmu_supported,
.falcon_base_addr = gk20a_pmu_falcon_base_addr,

1
drivers/gpu/nvgpu/hal/init/hal_gp10b.c
View File

@@ -970,6 +970,7 @@ static const struct gpu_ops gp10b_ops = {
.pmu = {
/* Init */
.pmu_early_init = nvgpu_pmu_early_init,
.pmu_rtos_init = nvgpu_pmu_rtos_init,
.pmu_pstate_sw_setup = nvgpu_pmu_pstate_sw_setup,
.pmu_pstate_pmu_setup = nvgpu_pmu_pstate_pmu_setup,
.pmu_destroy = nvgpu_pmu_destroy,

1
drivers/gpu/nvgpu/hal/init/hal_gv11b.c
View File

@@ -1173,6 +1173,7 @@ static const struct gpu_ops gv11b_ops = {
.validate_mem_integrity = gv11b_pmu_validate_mem_integrity,
#ifdef CONFIG_NVGPU_LS_PMU
/* Init */
.pmu_rtos_init = nvgpu_pmu_rtos_init,
.pmu_pstate_sw_setup = nvgpu_pmu_pstate_sw_setup,
.pmu_pstate_pmu_setup = nvgpu_pmu_pstate_pmu_setup,
.pmu_destroy = nvgpu_pmu_destroy,

1
drivers/gpu/nvgpu/hal/init/hal_tu104.c
View File

@@ -1177,6 +1177,7 @@ static const struct gpu_ops tu104_ops = {
.pmu = {
/* Init */
.pmu_early_init = nvgpu_pmu_early_init,
.pmu_rtos_init = nvgpu_pmu_rtos_init,
.pmu_pstate_sw_setup = nvgpu_pmu_pstate_sw_setup,
.pmu_pstate_pmu_setup = nvgpu_pmu_pstate_pmu_setup,
.pmu_destroy = nvgpu_pmu_destroy,

1
drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gp10b.c
View File

@@ -684,6 +684,7 @@ static const struct gpu_ops vgpu_gp10b_ops = {
#ifdef CONFIG_NVGPU_LS_PMU
.pmu = {
.pmu_early_init = nvgpu_pmu_early_init,
.pmu_rtos_init = nvgpu_pmu_rtos_init,
.pmu_pstate_sw_setup = nvgpu_pmu_pstate_sw_setup,
.pmu_pstate_pmu_setup = nvgpu_pmu_pstate_pmu_setup,
.pmu_destroy = nvgpu_pmu_destroy,

1
drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c
View File

@@ -797,6 +797,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
#ifdef CONFIG_NVGPU_LS_PMU
.pmu = {
.pmu_early_init = nvgpu_pmu_early_init,
.pmu_rtos_init = nvgpu_pmu_rtos_init,
.pmu_pstate_sw_setup = nvgpu_pmu_pstate_sw_setup,
.pmu_pstate_pmu_setup = nvgpu_pmu_pstate_pmu_setup,
.pmu_destroy = nvgpu_pmu_destroy,

1
drivers/gpu/nvgpu/include/nvgpu/gk20a.h
View File

@@ -1208,6 +1208,7 @@ struct gpu_ops {
} therm;
struct {
int (*pmu_early_init)(struct gk20a *g);
int (*pmu_rtos_init)(struct gk20a *g);
int (*pmu_destroy)(struct gk20a *g, struct nvgpu_pmu *pmu);
int (*pmu_pstate_sw_setup)(struct gk20a *g);
int (*pmu_pstate_pmu_setup)(struct gk20a *g);