mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-24 10:34:43 +03:00
gpu: nvgpu: pmu: update init APIs
Remove the second parameter for the pmu_early_init() and pmu_init() functions so they only require the gk20a object. The g->pmu was always passed for this parameter. And this makes the API signature match the other init functions in the driver. JIRA NVGPU-3980 Change-Id: Iae9361a5f14bc5c1d02f4ddb6583f30b71b22d59 Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2202968 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
78c1f328bb
commit
b53ec4731e
@@ -346,7 +346,7 @@ int nvgpu_finalize_poweron(struct gk20a *g)
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return err;
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}
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err = g->ops.pmu.pmu_early_init(g, &g->pmu);
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err = g->ops.pmu.pmu_early_init(g);
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if (err != 0) {
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nvgpu_err(g, "failed to early init pmu sw");
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goto done;
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@@ -523,7 +523,7 @@ int nvgpu_finalize_poweron(struct gk20a *g)
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#endif
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#ifdef CONFIG_NVGPU_LS_PMU
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err = nvgpu_pmu_rtos_init(g, g->pmu);
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err = nvgpu_pmu_rtos_init(g);
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if (err != 0) {
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nvgpu_err(g, "failed to init gk20a pmu");
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nvgpu_mutex_release(&g->tpc_pg_lock);
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@@ -143,14 +143,14 @@ void nvgpu_pmu_remove_support(struct gk20a *g, struct nvgpu_pmu *pmu)
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}
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/* PMU unit init */
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int nvgpu_pmu_early_init(struct gk20a *g, struct nvgpu_pmu **pmu_p)
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int nvgpu_pmu_early_init(struct gk20a *g)
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{
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int err = 0;
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struct nvgpu_pmu *pmu;
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nvgpu_log_fn(g, " ");
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if (*pmu_p != NULL) {
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if (g->pmu != NULL) {
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/* skip alloc/reinit for unrailgate sequence */
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nvgpu_pmu_dbg(g, "skip pmu init for unrailgate sequence");
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goto exit;
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@@ -162,7 +162,7 @@ int nvgpu_pmu_early_init(struct gk20a *g, struct nvgpu_pmu **pmu_p)
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goto exit;
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}
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*pmu_p = pmu;
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g->pmu = pmu;
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pmu->g = g;
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pmu->flcn = &g->pmu_flcn;
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@@ -209,17 +209,17 @@ exit:
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return err;
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}
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int nvgpu_pmu_rtos_init(struct gk20a *g, struct nvgpu_pmu *pmu)
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int nvgpu_pmu_rtos_init(struct gk20a *g)
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{
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int err = 0;
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nvgpu_log_fn(g, " ");
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if (!g->support_ls_pmu) {
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if (!g->support_ls_pmu || (g->pmu == NULL)) {
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goto exit;
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}
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err = pmu_sw_setup(g, pmu);
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err = pmu_sw_setup(g, g->pmu);
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if (err != 0) {
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goto exit;
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}
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@@ -252,8 +252,8 @@ int nvgpu_pmu_rtos_init(struct gk20a *g, struct nvgpu_pmu *pmu)
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g->ops.pmu.setup_apertures(g);
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}
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err = nvgpu_pmu_lsfm_ls_pmu_cmdline_args_copy(g, pmu,
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pmu->lsfm);
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err = nvgpu_pmu_lsfm_ls_pmu_cmdline_args_copy(g, g->pmu,
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g->pmu->lsfm);
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if (err != 0) {
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goto exit;
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}
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@@ -271,13 +271,13 @@ int nvgpu_pmu_rtos_init(struct gk20a *g, struct nvgpu_pmu *pmu)
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}
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} else {
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/* non-secure boot */
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err = nvgpu_pmu_ns_fw_bootstrap(g, pmu);
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err = nvgpu_pmu_ns_fw_bootstrap(g, g->pmu);
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if (err != 0) {
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goto exit;
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}
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}
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nvgpu_pmu_fw_state_change(g, pmu, PMU_FW_STATE_STARTING, false);
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nvgpu_pmu_fw_state_change(g, g->pmu, PMU_FW_STATE_STARTING, false);
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exit:
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return err;
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@@ -1207,8 +1207,7 @@ struct gpu_ops {
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u32 (*idle_slowdown_disable)(struct gk20a *g);
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} therm;
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struct {
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int (*pmu_early_init)(struct gk20a *g,
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struct nvgpu_pmu **pmu_p);
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int (*pmu_early_init)(struct gk20a *g);
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int (*pmu_destroy)(struct gk20a *g, struct nvgpu_pmu *pmu);
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int (*pmu_pstate_sw_setup)(struct gk20a *g);
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int (*pmu_pstate_pmu_setup)(struct gk20a *g);
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@@ -329,7 +329,7 @@ int nvgpu_pmu_lock_release(struct gk20a *g, struct nvgpu_pmu *pmu,
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/* PMU RTOS init/setup functions*/
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int nvgpu_pmu_rtos_early_init(struct gk20a *g, struct nvgpu_pmu *pmu);
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int nvgpu_pmu_rtos_init(struct gk20a *g, struct nvgpu_pmu *pmu);
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int nvgpu_pmu_rtos_init(struct gk20a *g);
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int nvgpu_pmu_destroy(struct gk20a *g, struct nvgpu_pmu *pmu);
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#endif
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@@ -366,7 +366,6 @@ int nvgpu_pmu_reset(struct gk20a *g);
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* detected chip,
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*
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* @param g [in] The GPU driver struct.
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* @param nvgpu_pmu [in] The PMU unit.
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*
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* Initializes PMU unit data struct in the GPU driver based on detected chip.
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* Allocate memory for #nvgpu_pmu data struct & set PMU Engine h/w properties,
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@@ -375,7 +374,7 @@ int nvgpu_pmu_reset(struct gk20a *g);
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*
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* @return 0 in case of success, < 0 in case of failure.
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*/
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int nvgpu_pmu_early_init(struct gk20a *g, struct nvgpu_pmu **pmu_p);
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int nvgpu_pmu_early_init(struct gk20a *g);
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/**
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* @brief PMU remove to free space allocted for PMU unit
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@@ -154,7 +154,7 @@ static int test_pmu_early_init(struct unit_module *m,
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* allocation failure
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*/
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nvgpu_posix_enable_fault_injection(kmem_fi, true, 0);
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err = nvgpu_pmu_early_init(g, &g->pmu);
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err = nvgpu_pmu_early_init(g);
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if (err != -ENOMEM) {
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unit_return_fail(m,
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@@ -165,7 +165,7 @@ static int test_pmu_early_init(struct unit_module *m,
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nvgpu_pmu_remove_support(g, g->pmu);
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/* Case 2: nvgpu_pmu_early_init() passes */
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err = nvgpu_pmu_early_init(g, &g->pmu);
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err = nvgpu_pmu_early_init(g);
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if (err != 0) {
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unit_return_fail(m, "nvgpu_pmu_early_init failed\n");
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}
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@@ -175,7 +175,7 @@ static int test_pmu_early_init(struct unit_module *m,
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/* case 3: */
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g->support_ls_pmu = false;
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err = nvgpu_pmu_early_init(g, &g->pmu);
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err = nvgpu_pmu_early_init(g);
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if (err != 0) {
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unit_return_fail(m, "support_ls_pmu failed\n");
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}
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@@ -185,7 +185,7 @@ static int test_pmu_early_init(struct unit_module *m,
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/* case 4: */
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g->support_ls_pmu = true;
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g->ops.pmu.is_pmu_supported = stub_gv11b_is_pmu_supported;
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err = nvgpu_pmu_early_init(g, &g->pmu);
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err = nvgpu_pmu_early_init(g);
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if (g->support_ls_pmu != false || g->can_elpg != false ||
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g->elpg_enabled != false || g->aelpg_enabled != false) {
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@@ -203,7 +203,7 @@ static int test_pmu_remove_support(struct unit_module *m,
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{
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int err;
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err = nvgpu_pmu_early_init(g, &g->pmu);
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err = nvgpu_pmu_early_init(g);
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if (err != 0) {
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unit_return_fail(m, "support_ls_pmu failed\n");
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}
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@@ -228,7 +228,7 @@ static int test_pmu_reset(struct unit_module *m,
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}
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/* initialize PMU */
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err = nvgpu_pmu_early_init(g, &g->pmu);
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err = nvgpu_pmu_early_init(g);
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if (err != 0) {
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unit_return_fail(m, "nvgpu_pmu_early_init failed\n");
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}
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