gpu: nvgpu: Fix memory leaks in common.acr

The SEC2 ucode allocation code does not free the struct nvgpu_firmware
data structures used while requesting firmwares - sec2_fw, sec2_desc
and sec2_sig.
The lsfm_free_nonpmu_ucode_img_res() API only frees the 'data' field
of struct nvgpu_firmware, but not the entire struct.
Fix these memory leaks by calling nvgpu_release_firmware() API
after the intended use of allocated struct is achieved.

Bug 200690283

Change-Id: I1ed2e1603455bce65af897a40aa31ccc82fda4b0
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2488219
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
smadhavan
2021-05-20 12:47:04 +05:30
committed by mobile promotions
parent 18239c3a25
commit 19fa7004aa
3 changed files with 41 additions and 2 deletions

View File

@@ -554,6 +554,10 @@ int nvgpu_acr_lsf_sec2_ucode_details(struct gk20a *g, void *lsf_ucode_img)
p_img->data_size = desc->app_start_offset + desc->app_size;
p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc;
g->sec2.fw.fw_image = sec2_fw;
g->sec2.fw.fw_desc = sec2_desc;
g->sec2.fw.fw_sig = sec2_sig;
nvgpu_acr_dbg(g, "requesting SEC2 ucode in %s done", g->name);
return err;
@@ -1404,6 +1408,17 @@ static void lsfm_free_nonpmu_ucode_img_res(struct gk20a *g,
}
}
static void lsfm_free_sec2_ucode_img_res(struct gk20a *g,
struct flcn_ucode_img *p_img)
{
if (p_img->lsf_desc != NULL) {
nvgpu_kfree(g, p_img->lsf_desc);
p_img->lsf_desc = NULL;
}
p_img->data = NULL;
p_img->desc = NULL;
}
static void free_acr_resources(struct gk20a *g, struct ls_flcn_mgr *plsfm)
{
u32 cnt = plsfm->managed_flcn_cnt;
@@ -1414,6 +1429,11 @@ static void free_acr_resources(struct gk20a *g, struct ls_flcn_mgr *plsfm)
if (mg_ucode_img->ucode_img.lsf_desc != NULL &&
mg_ucode_img->ucode_img.lsf_desc->falcon_id == FALCON_ID_PMU) {
lsfm_free_ucode_img_res(g, &mg_ucode_img->ucode_img);
} else if (mg_ucode_img->ucode_img.lsf_desc != NULL &&
mg_ucode_img->ucode_img.lsf_desc->falcon_id ==
FALCON_ID_SEC2) {
lsfm_free_sec2_ucode_img_res(g,
&mg_ucode_img->ucode_img);
} else {
lsfm_free_nonpmu_ucode_img_res(g,
&mg_ucode_img->ucode_img);

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -21,6 +21,7 @@
*/
#include <nvgpu/gk20a.h>
#include <nvgpu/firmware.h>
#include <nvgpu/log.h>
#include <nvgpu/sec2/sec2.h>
#include <nvgpu/sec2/queue.h>
@@ -85,6 +86,16 @@ int nvgpu_sec2_destroy(struct gk20a *g)
nvgpu_log_fn(g, " ");
if (g->sec2.fw.fw_image != NULL) {
nvgpu_release_firmware(g, g->sec2.fw.fw_image);
}
if (g->sec2.fw.fw_desc != NULL) {
nvgpu_release_firmware(g, g->sec2.fw.fw_desc);
}
if (g->sec2.fw.fw_sig != NULL) {
nvgpu_release_firmware(g, g->sec2.fw.fw_sig);
}
nvgpu_sec2_dmem_allocator_destroy(&sec2->dmem);
nvgpu_mutex_acquire(&sec2->isr_mutex);

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -39,6 +39,12 @@ struct nvgpu_engine_mem_queue;
#define NVGPU_SEC2_TRACE_BUFSIZE (32U * 1024U)
struct sec2_fw {
struct nvgpu_firmware *fw_desc;
struct nvgpu_firmware *fw_image;
struct nvgpu_firmware *fw_sig;
};
struct nvgpu_sec2 {
struct gk20a *g;
struct nvgpu_falcon flcn;
@@ -61,6 +67,8 @@ struct nvgpu_sec2 {
void (*remove_support)(struct nvgpu_sec2 *sec2);
u32 command_ack;
struct sec2_fw fw;
};
/* sec2 init */