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gpu: nvgpu: Fix memory leaks in common.acr
The SEC2 ucode allocation code does not free the struct nvgpu_firmware data structures used while requesting firmwares - sec2_fw, sec2_desc and sec2_sig. The lsfm_free_nonpmu_ucode_img_res() API only frees the 'data' field of struct nvgpu_firmware, but not the entire struct. Fix these memory leaks by calling nvgpu_release_firmware() API after the intended use of allocated struct is achieved. Bug 200690283 Change-Id: I1ed2e1603455bce65af897a40aa31ccc82fda4b0 Signed-off-by: smadhavan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2488219 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -554,6 +554,10 @@ int nvgpu_acr_lsf_sec2_ucode_details(struct gk20a *g, void *lsf_ucode_img)
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p_img->data_size = desc->app_start_offset + desc->app_size;
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p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc;
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g->sec2.fw.fw_image = sec2_fw;
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g->sec2.fw.fw_desc = sec2_desc;
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g->sec2.fw.fw_sig = sec2_sig;
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nvgpu_acr_dbg(g, "requesting SEC2 ucode in %s done", g->name);
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return err;
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@@ -1404,6 +1408,17 @@ static void lsfm_free_nonpmu_ucode_img_res(struct gk20a *g,
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}
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}
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static void lsfm_free_sec2_ucode_img_res(struct gk20a *g,
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struct flcn_ucode_img *p_img)
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{
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if (p_img->lsf_desc != NULL) {
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nvgpu_kfree(g, p_img->lsf_desc);
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p_img->lsf_desc = NULL;
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}
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p_img->data = NULL;
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p_img->desc = NULL;
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}
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static void free_acr_resources(struct gk20a *g, struct ls_flcn_mgr *plsfm)
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{
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u32 cnt = plsfm->managed_flcn_cnt;
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@@ -1414,6 +1429,11 @@ static void free_acr_resources(struct gk20a *g, struct ls_flcn_mgr *plsfm)
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if (mg_ucode_img->ucode_img.lsf_desc != NULL &&
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mg_ucode_img->ucode_img.lsf_desc->falcon_id == FALCON_ID_PMU) {
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lsfm_free_ucode_img_res(g, &mg_ucode_img->ucode_img);
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} else if (mg_ucode_img->ucode_img.lsf_desc != NULL &&
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mg_ucode_img->ucode_img.lsf_desc->falcon_id ==
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FALCON_ID_SEC2) {
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lsfm_free_sec2_ucode_img_res(g,
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&mg_ucode_img->ucode_img);
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} else {
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lsfm_free_nonpmu_ucode_img_res(g,
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&mg_ucode_img->ucode_img);
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -21,6 +21,7 @@
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/firmware.h>
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#include <nvgpu/log.h>
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#include <nvgpu/sec2/sec2.h>
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#include <nvgpu/sec2/queue.h>
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@@ -85,6 +86,16 @@ int nvgpu_sec2_destroy(struct gk20a *g)
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nvgpu_log_fn(g, " ");
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if (g->sec2.fw.fw_image != NULL) {
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nvgpu_release_firmware(g, g->sec2.fw.fw_image);
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}
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if (g->sec2.fw.fw_desc != NULL) {
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nvgpu_release_firmware(g, g->sec2.fw.fw_desc);
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}
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if (g->sec2.fw.fw_sig != NULL) {
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nvgpu_release_firmware(g, g->sec2.fw.fw_sig);
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}
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nvgpu_sec2_dmem_allocator_destroy(&sec2->dmem);
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nvgpu_mutex_acquire(&sec2->isr_mutex);
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -39,6 +39,12 @@ struct nvgpu_engine_mem_queue;
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#define NVGPU_SEC2_TRACE_BUFSIZE (32U * 1024U)
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struct sec2_fw {
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struct nvgpu_firmware *fw_desc;
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struct nvgpu_firmware *fw_image;
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struct nvgpu_firmware *fw_sig;
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};
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struct nvgpu_sec2 {
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struct gk20a *g;
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struct nvgpu_falcon flcn;
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@@ -61,6 +67,8 @@ struct nvgpu_sec2 {
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void (*remove_support)(struct nvgpu_sec2 *sec2);
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u32 command_ack;
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struct sec2_fw fw;
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};
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/* sec2 init */
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