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gpu: nvgpu: acr: fix misra 5.9 violation

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Advisory Rule 5.9 states that identifiers that define objects or functions
with internal linkage should be unique.

This change eliminates an Advisory Rule 5.9 violation in our acr code
due to duplicate definitions of flcn64_set_dma() by placing a single
inline version in flcnif_cmn.h.

Jira NVGPU-3178

Change-Id: Id9171059ee490cbadd46204f520fccefc44669f7
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2190074
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Scott Long
2019-09-04 09:43:50 -07:00
committed by Alex Waterman
parent b10ff42480
commit 1a2de585d1
3 changed files with 6 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/nvgpu/common/acr/acr_blob_construct_v1.c
View File

@@ -33,12 +33,6 @@
#include "acr_wpr.h" #include "acr_wpr.h"
#include "acr_priv.h" #include "acr_priv.h"
static void flcn64_set_dma(struct falc_u64 *dma_addr, u64 value)
{
dma_addr->lo |= u64_lo32(value);
dma_addr->hi |= u64_hi32(value);
}
#ifdef CONFIG_NVGPU_LS_PMU #ifdef CONFIG_NVGPU_LS_PMU
int nvgpu_acr_lsf_pmu_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img) int nvgpu_acr_lsf_pmu_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img)
{ {

6
drivers/gpu/nvgpu/common/acr/acr_sw_gv11b.c
View File

@@ -35,12 +35,6 @@
#include "acr_bootstrap.h" #include "acr_bootstrap.h"
#include "acr_sw_gv11b.h" #include "acr_sw_gv11b.h"
static void flcn64_set_dma(struct falc_u64 *dma_addr, u64 value)
{
dma_addr->lo |= u64_lo32(value);
dma_addr->hi |= u64_hi32(value);
}
static void gv11b_acr_patch_wpr_info_to_ucode(struct gk20a *g, static void gv11b_acr_patch_wpr_info_to_ucode(struct gk20a *g,
struct nvgpu_acr *acr, struct hs_acr *acr_desc, bool is_recovery) struct nvgpu_acr *acr, struct hs_acr *acr_desc, bool is_recovery)
{ {

6
drivers/gpu/nvgpu/include/nvgpu/flcnif_cmn.h
View File

@@ -33,6 +33,12 @@ struct falc_u64 {
u32 hi; u32 hi;
}; };
static inline void flcn64_set_dma(struct falc_u64 *dma_addr, u64 value)
{
dma_addr->lo |= u64_lo32(value);
dma_addr->hi |= u64_hi32(value);
}
struct falc_dma_addr { struct falc_dma_addr {
u32 dma_base; u32 dma_base;
/* /*