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gpu: nvgpu: Add gr.ops NULL-ptr check

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This fix add NULL-ptr checks for some of the user-accessible
ioctl.

Bug 3240771
Bug 200696704

Change-Id: Ibe7f75b31b2521a530883253a93ba832f010dc80
Signed-off-by: Thomas Steinle <tsteinle@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2483635
(cherry picked from commit cc717e3145)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2490126
Tested-by: Dinesh T <dt@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Thomas Steinle
2021-02-11 13:59:33 +01:00
committed by mobile promotions
parent 53cc5be723
commit 1b5a9b28ea
2 changed files with 22 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
drivers/gpu/nvgpu/hal/gr/gr/gr_gk20a.c
View File

@@ -1,7 +1,7 @@
/*
* GK20A Graphics
*
* Copyright (c) 2011-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2011-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -2108,7 +2108,17 @@ int gr_gk20a_wait_for_pause(struct gk20a *g, struct nvgpu_warpstate *w_state)
int err = 0;
u32 gpc, tpc, sm, sm_id;
u32 global_mask;
u32 no_of_sm = g->ops.gr.init.get_no_of_sm(g);
u32 no_of_sm;
if((g->ops.gr.init.get_no_of_sm == NULL) ||
(g->ops.gr.intr.get_sm_no_lock_down_hww_global_esr_mask == NULL) ||
(g->ops.gr.lock_down_sm == NULL) ||
(g->ops.gr.bpt_reg_info == NULL) ||
(g->ops.gr.sm_debugger_attached == NULL)) {
return -EINVAL;
}
no_of_sm = g->ops.gr.init.get_no_of_sm(g);
if (!g->ops.gr.sm_debugger_attached(g)) {
nvgpu_err(g,
@@ -2177,6 +2187,11 @@ int gr_gk20a_clear_sm_errors(struct gk20a *g)
u32 global_esr;
u32 sm_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC);
if ((g->ops.gr.intr.get_sm_hww_global_esr == NULL) ||
(g->ops.gr.intr.clear_sm_hww == NULL)) {
return -EINVAL;
}
for (gpc = 0; gpc < nvgpu_gr_config_get_gpc_count(gr->config); gpc++) {
/* check if any tpc has an exception */

6
drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2011-2020, NVIDIA Corporation. All rights reserved.
* Copyright (c) 2011-2021, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -949,6 +949,10 @@ static int nvgpu_gpu_ioctl_has_any_exception(
{
u64 tpc_exception_en;
if (g->ops.gr.intr.tpc_enabled_exceptions == NULL) {
return -ENOSYS;
}
nvgpu_mutex_acquire(&g->dbg_sessions_lock);
tpc_exception_en = g->ops.gr.intr.tpc_enabled_exceptions(g);
nvgpu_mutex_release(&g->dbg_sessions_lock);