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Revert "gpu: nvgpu: gv11b: enable devfreq"

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This reverts commit 968d8cd3e5.

Bug 2049965

Bug 2039013
Bug 200377508

Change-Id: I813947417740f8d3a0c9bea82784df1dd4a5f1ac
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1644224
Reviewed-by: David Pu <dpu@nvidia.com>
Tested-by: David Pu <dpu@nvidia.com>
This commit is contained in:
Konsta Holtta
2018-01-23 01:26:32 -08:00
committed by David Pu
parent 013158221a
commit 1b75e7277a
3 changed files with 10 additions and 43 deletions
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14
drivers/gpu/nvgpu/common/linux/platform_gp10b_tegra.c
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@@ -1,7 +1,7 @@
/*
* GP10B Tegra Platform Interface
*
* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -150,7 +150,7 @@ static int gp10b_tegra_probe(struct device *dev)
return 0;
}
int gp10b_tegra_late_probe(struct device *dev)
static int gp10b_tegra_late_probe(struct device *dev)
{
/* Cause early VPR resize */
gk20a_tegra_secure_page_alloc(dev);
@@ -262,7 +262,7 @@ int gp10b_tegra_reset_deassert(struct device *dev)
return ret;
}
void gp10b_tegra_prescale(struct device *dev)
static void gp10b_tegra_prescale(struct device *dev)
{
struct gk20a *g = get_gk20a(dev);
u32 avg = 0;
@@ -274,7 +274,7 @@ void gp10b_tegra_prescale(struct device *dev)
gk20a_dbg_fn("done");
}
void gp10b_tegra_postscale(struct device *pdev,
static void gp10b_tegra_postscale(struct device *pdev,
unsigned long freq)
{
struct gk20a_platform *platform = gk20a_get_platform(pdev);
@@ -283,7 +283,7 @@ void gp10b_tegra_postscale(struct device *pdev,
unsigned long emc_rate;
gk20a_dbg_fn("");
if (profile && !platform->is_railgated(pdev)) {
if (profile && !gp10b_tegra_is_railgated(pdev)) {
unsigned long emc_scale;
if (freq <= gp10b_freq_table[0])
@@ -303,7 +303,7 @@ void gp10b_tegra_postscale(struct device *pdev,
gk20a_dbg_fn("done");
}
long gp10b_round_clk_rate(struct device *dev, unsigned long rate)
static long gp10b_round_clk_rate(struct device *dev, unsigned long rate)
{
struct gk20a *g = get_gk20a(dev);
struct gk20a_scale_profile *profile = g->scale_profile;
@@ -318,7 +318,7 @@ long gp10b_round_clk_rate(struct device *dev, unsigned long rate)
return freq_table[max_states - 1];
}
int gp10b_clk_get_freqs(struct device *dev,
static int gp10b_clk_get_freqs(struct device *dev,
unsigned long **freqs, int *num_freqs)
{
struct gk20a_platform *platform = gk20a_get_platform(dev);

30
drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c
View File

@@ -1,7 +1,7 @@
/*
* GV11B Tegra Platform Interface
*
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -23,7 +23,6 @@
#include <linux/reset.h>
#include <linux/hashtable.h>
#include <linux/clk.h>
#include <linux/platform/tegra/emc_bwmgr.h>
#include <nvgpu/nvhost.h>
@@ -35,7 +34,6 @@
#include "gk20a/gk20a.h"
#include "platform_gk20a.h"
#include "clk.h"
#include "scale.h"
#include "gp10b/platform_gp10b.h"
#include "platform_gp10b_tegra.h"
@@ -130,16 +128,9 @@ static int gv11b_tegra_railgate(struct device *dev)
{
#ifdef TEGRA194_POWER_DOMAIN_GPU
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct gk20a_scale_profile *profile = platform->g->scale_profile;
struct gk20a *g = get_gk20a(dev);
int i;
/* remove emc frequency floor */
if (profile)
tegra_bwmgr_set_emc(
(struct tegra_bwmgr_client *)profile->private_data,
0, TEGRA_BWMGR_SET_EMC_FLOOR);
if (tegra_bpmp_running()) {
nvgpu_log(g, gpu_dbg_info, "bpmp running");
if (!tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU)) {
@@ -166,7 +157,6 @@ static int gv11b_tegra_unrailgate(struct device *dev)
#ifdef TEGRA194_POWER_DOMAIN_GPU
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct gk20a *g = get_gk20a(dev);
struct gk20a_scale_profile *profile = platform->g->scale_profile;
int i;
if (tegra_bpmp_running()) {
@@ -185,13 +175,6 @@ static int gv11b_tegra_unrailgate(struct device *dev)
} else {
nvgpu_log(g, gpu_dbg_info, "bpmp not running");
}
/* to start with set emc frequency floor to max rate*/
if (profile)
tegra_bwmgr_set_emc(
(struct tegra_bwmgr_client *)profile->private_data,
tegra_bwmgr_get_max_emc_rate(),
TEGRA_BWMGR_SET_EMC_FLOOR);
#endif
return ret;
}
@@ -215,7 +198,6 @@ struct gk20a_platform gv11b_tegra_platform = {
.ch_wdt_timeout_ms = 5000,
.probe = gv11b_tegra_probe,
.late_probe = gp10b_tegra_late_probe,
.remove = gv11b_tegra_remove,
.enable_slcg = false,
@@ -235,16 +217,6 @@ struct gk20a_platform gv11b_tegra_platform = {
.busy = gk20a_tegra_busy,
.idle = gk20a_tegra_idle,
.clk_round_rate = gp10b_round_clk_rate,
.get_clk_freqs = gp10b_clk_get_freqs,
/* frequency scaling configuration */
.prescale = gp10b_tegra_prescale,
.postscale = gp10b_tegra_postscale,
.devfreq_governor = "nvhost_podgov",
.qos_notify = gk20a_scale_qos_notify,
.dump_platform_dependencies = gk20a_tegra_debug_dump,
.soc_name = "tegra19x",

9
drivers/gpu/nvgpu/gp10b/platform_gp10b.h
View File

@@ -1,7 +1,7 @@
/*
* GP10B Platform (SoC) Interface
*
* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -30,10 +30,5 @@ struct device;
int gp10b_tegra_get_clocks(struct device *dev);
int gp10b_tegra_reset_assert(struct device *dev);
int gp10b_tegra_reset_deassert(struct device *dev);
long gp10b_round_clk_rate(struct device *dev, unsigned long rate);
int gp10b_clk_get_freqs(struct device *dev,
unsigned long **freqs, int *num_freqs);
void gp10b_tegra_prescale(struct device *dev);
void gp10b_tegra_postscale(struct device *pdev, unsigned long freq);
int gp10b_tegra_late_probe(struct device *dev);
#endif