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gpu: nvgpu: Make access map chip specific

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Bug 1692373

Change-Id: Ie3fc3e02fa7b0636da464d6ee1c28da7a4543ec2
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/812353
This commit is contained in:
Terje Bergstrom
2015-10-06 10:59:26 -07:00
parent cbda0b2b71
commit 1ee25b11c5
3 changed files with 44 additions and 17 deletions
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2
drivers/gpu/nvgpu/gk20a/gk20a.h
View File

@@ -187,6 +187,8 @@ struct gpu_ops {
void (*enable_cde_in_fecs)(void *ctx_ptr);
void (*bpt_reg_info)(struct gk20a *g,
struct warpstate *w_state);
void (*get_access_map)(struct gk20a *g,
u32 **whitelist, int *num_entries);
} gr;
const char *name;
struct {

41
drivers/gpu/nvgpu/gk20a/gr_gk20a.c
View File

@@ -4280,20 +4280,6 @@ out:
return 0;
}
/*
* XXX Merge this list with the debugger/profiler
* session regops whitelists?
*/
static u32 wl_addr_gk20a[] = {
/* this list must be sorted (low to high) */
0x404468, /* gr_pri_mme_max_instructions */
0x418800, /* gr_pri_gpcs_setup_debug */
0x419a04, /* gr_pri_gpcs_tpcs_tex_lod_dbg */
0x419a08, /* gr_pri_gpcs_tpcs_tex_samp_dbg */
0x419e10, /* gr_pri_gpcs_tpcs_sm_dbgr_control0 */
0x419f78, /* gr_pri_gpcs_tpcs_sm_disp_ctrl */
};
static int gr_gk20a_init_access_map(struct gk20a *g)
{
struct gr_gk20a *gr = &g->gr;
@@ -4302,6 +4288,8 @@ static int gr_gk20a_init_access_map(struct gk20a *g)
u32 w, nr_pages =
DIV_ROUND_UP(gr->ctx_vars.priv_access_map_size,
PAGE_SIZE);
u32 *whitelist = NULL;
int num_entries = 0;
data = vmap(gr->global_ctx_buffer[PRIV_ACCESS_MAP].mem.pages,
PAGE_ALIGN(gr->global_ctx_buffer[PRIV_ACCESS_MAP].mem.size) >>
@@ -4315,13 +4303,15 @@ static int gr_gk20a_init_access_map(struct gk20a *g)
memset(data, 0x0, PAGE_SIZE * nr_pages);
for (w = 0; w < ARRAY_SIZE(wl_addr_gk20a); w++) {
g->ops.gr.get_access_map(g, &whitelist, &num_entries);
for (w = 0; w < num_entries; w++) {
u32 map_bit, map_byte, map_shift;
map_bit = wl_addr_gk20a[w] >> 2;
map_bit = whitelist[w] >> 2;
map_byte = map_bit >> 3;
map_shift = map_bit & 0x7; /* i.e. 0-7 */
gk20a_dbg_info("access map addr:0x%x byte:0x%x bit:%d",
wl_addr_gk20a[w], map_byte, map_shift);
whitelist[w], map_byte, map_shift);
((u8 *)data)[map_byte] |= 1 << map_shift;
}
@@ -7315,6 +7305,22 @@ void gr_gk20a_bpt_reg_info(struct gk20a *g, struct warpstate *w_state)
}
}
static void gr_gk20a_get_access_map(struct gk20a *g,
u32 **whitelist, int *num_entries)
{
static u32 wl_addr_gk20a[] = {
/* this list must be sorted (low to high) */
0x404468, /* gr_pri_mme_max_instructions */
0x418800, /* gr_pri_gpcs_setup_debug */
0x419a04, /* gr_pri_gpcs_tpcs_tex_lod_dbg */
0x419a08, /* gr_pri_gpcs_tpcs_tex_samp_dbg */
0x419e10, /* gr_pri_gpcs_tpcs_sm_dbgr_control0 */
0x419f78, /* gr_pri_gpcs_tpcs_sm_disp_ctrl */
};
*whitelist = wl_addr_gk20a;
*num_entries = ARRAY_SIZE(wl_addr_gk20a);
}
void gk20a_init_gr_ops(struct gpu_ops *gops)
{
@@ -7368,4 +7374,5 @@ void gk20a_init_gr_ops(struct gpu_ops *gops)
gops->gr.wait_empty = gr_gk20a_wait_idle;
gops->gr.init_cyclestats = gr_gk20a_init_cyclestats;
gops->gr.bpt_reg_info = gr_gk20a_bpt_reg_info;
gops->gr.get_access_map = gr_gk20a_get_access_map;
}

18
drivers/gpu/nvgpu/gm20b/gr_gm20b.c
View File

@@ -1127,6 +1127,23 @@ void gr_gm20b_bpt_reg_info(struct gk20a *g, struct warpstate *w_state)
}
}
static void gr_gm20b_get_access_map(struct gk20a *g,
u32 **whitelist, int *num_entries)
{
static u32 wl_addr_gm20b[] = {
/* this list must be sorted (low to high) */
0x404468, /* gr_pri_mme_max_instructions */
0x418800, /* gr_pri_gpcs_setup_debug */
0x419a04, /* gr_pri_gpcs_tpcs_tex_lod_dbg */
0x419a08, /* gr_pri_gpcs_tpcs_tex_samp_dbg */
0x419e10, /* gr_pri_gpcs_tpcs_sm_dbgr_control0 */
0x419f78, /* gr_pri_gpcs_tpcs_sm_disp_ctrl */
};
*whitelist = wl_addr_gm20b;
*num_entries = ARRAY_SIZE(wl_addr_gm20b);
}
void gm20b_init_gr(struct gpu_ops *gops)
{
gops->gr.init_gpc_mmu = gr_gm20b_init_gpc_mmu;
@@ -1184,4 +1201,5 @@ void gm20b_init_gr(struct gpu_ops *gops)
gops->gr.init_cyclestats = gr_gm20b_init_cyclestats;
gops->gr.enable_cde_in_fecs = gr_gm20b_enable_cde_in_fecs;
gops->gr.bpt_reg_info = gr_gm20b_bpt_reg_info;
gops->gr.get_access_map = gr_gm20b_get_access_map;
}