gpu: nvgpu: gv11b: hw header for CL 37750038 and mmu fault

JIRA GV11B-7

Change-Id: I32428e6b91050ad3f697eb80e2aabda2cc1bfda4
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1249339
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

drivers/gpu/nvgpu/gv11b/hw_ccsr_gv11b.h

@@ -110,6 +110,22 @@ static inline u32 ccsr_channel_status_v(u32 r)
 {
 	return (r >> 24) & 0xf;
 }
+static inline u32 ccsr_channel_pbdma_faulted_f(u32 v)
+{
+	return (v & 0x1) << 22;
+}
+static inline u32 ccsr_channel_pbdma_faulted_reset_f(void)
+{
+	return 0x400000;
+}
+static inline u32 ccsr_channel_eng_faulted_f(u32 v)
+{
+	return (v & 0x1) << 23;
+}
+static inline u32 ccsr_channel_eng_faulted_reset_f(void)
+{
+	return 0x800000;
+}
 static inline u32 ccsr_channel_busy_v(u32 r)
 {
 	return (r >> 28) & 0x1;

drivers/gpu/nvgpu/gv11b/hw_fb_gv11b.h

@@ -1062,6 +1062,10 @@ static inline u32 fb_mmu_fault_inst_lo_aperture_sys_nocoh_v(void)
 {
 	return 0x00000003;
 }
+static inline u32 fb_mmu_fault_inst_lo_addr_f(u32 v)
+{
+	return (v & 0xfffff) << 12;
+}
 static inline u32 fb_mmu_fault_inst_lo_addr_v(u32 r)
 {
 	return (r >> 12) & 0xfffff;

drivers/gpu/nvgpu/gv11b/hw_fifo_gv11b.h

@@ -502,4 +502,16 @@ static inline u32 fifo_pbdma_status_chsw_in_progress_v(void)
 {
 	return 0x00000001;
 }
+static inline u32 fifo_cfg0_r(void)
+{
+	return 0x00002004;
+}
+static inline u32 fifo_cfg0_num_pbdma_v(u32 r)
+{
+	return (r >> 0) & 0xff;
+}
+static inline u32 fifo_cfg0_pbdma_fault_id_v(u32 r)
+{
+	return (r >> 16) & 0xff;
+}
 #endif

drivers/gpu/nvgpu/gv11b/hw_gmmu_gv11b.h

@@ -1274,4 +1274,204 @@ static inline u32 gmmu_pte_kind_s8_2s_v(void)
 {
 	return 0x0000002b;
 }
+static inline u32 gmmu_fault_buf_size_v(void)
+{
+	return 0x00000020;
+}
+static inline u32 gmmu_fault_buf_entry_inst_aperture_v(u32 r)
+{
+	return (r >> 8) & 0x3;
+}
+static inline u32 gmmu_fault_buf_entry_inst_aperture_w(void)
+{
+	return 0;
+}
+static inline u32 gmmu_fault_buf_entry_inst_aperture_vid_mem_v(void)
+{
+	return 0x00000000;
+}
+static inline u32 gmmu_fault_buf_entry_inst_aperture_sys_coh_v(void)
+{
+	return 0x00000002;
+}
+static inline u32 gmmu_fault_buf_entry_inst_aperture_sys_nocoh_v(void)
+{
+	return 0x00000003;
+}
+static inline u32 gmmu_fault_buf_entry_inst_lo_f(u32 v)
+{
+	return (v & 0xfffff) << 12;
+}
+static inline u32 gmmu_fault_buf_entry_inst_lo_v(u32 r)
+{
+	return (r >> 12) & 0xfffff;
+}
+static inline u32 gmmu_fault_buf_entry_inst_lo_w(void)
+{
+	return 0;
+}
+static inline u32 gmmu_fault_buf_entry_inst_hi_v(u32 r)
+{
+	return (r >> 0) & 0xffffffff;
+}
+static inline u32 gmmu_fault_buf_entry_inst_hi_w(void)
+{
+	return 1;
+}
+static inline u32 gmmu_fault_buf_entry_addr_phys_aperture_v(u32 r)
+{
+	return (r >> 0) & 0x3;
+}
+static inline u32 gmmu_fault_buf_entry_addr_phys_aperture_w(void)
+{
+	return 2;
+}
+static inline u32 gmmu_fault_buf_entry_addr_lo_f(u32 v)
+{
+	return (v & 0xfffff) << 12;
+}
+static inline u32 gmmu_fault_buf_entry_addr_lo_v(u32 r)
+{
+	return (r >> 12) & 0xfffff;
+}
+static inline u32 gmmu_fault_buf_entry_addr_lo_w(void)
+{
+	return 2;
+}
+static inline u32 gmmu_fault_buf_entry_addr_hi_v(u32 r)
+{
+	return (r >> 0) & 0xffffffff;
+}
+static inline u32 gmmu_fault_buf_entry_addr_hi_w(void)
+{
+	return 3;
+}
+static inline u32 gmmu_fault_buf_entry_timestamp_lo_v(u32 r)
+{
+	return (r >> 0) & 0xffffffff;
+}
+static inline u32 gmmu_fault_buf_entry_timestamp_lo_w(void)
+{
+	return 4;
+}
+static inline u32 gmmu_fault_buf_entry_timestamp_hi_v(u32 r)
+{
+	return (r >> 0) & 0xffffffff;
+}
+static inline u32 gmmu_fault_buf_entry_timestamp_hi_w(void)
+{
+	return 5;
+}
+static inline u32 gmmu_fault_buf_entry_engine_id_v(u32 r)
+{
+	return (r >> 0) & 0x1ff;
+}
+static inline u32 gmmu_fault_buf_entry_engine_id_w(void)
+{
+	return 6;
+}
+static inline u32 gmmu_fault_buf_entry_fault_type_v(u32 r)
+{
+	return (r >> 0) & 0x1f;
+}
+static inline u32 gmmu_fault_buf_entry_fault_type_w(void)
+{
+	return 7;
+}
+static inline u32 gmmu_fault_buf_entry_replayable_fault_v(u32 r)
+{
+	return (r >> 7) & 0x1;
+}
+static inline u32 gmmu_fault_buf_entry_replayable_fault_w(void)
+{
+	return 7;
+}
+static inline u32 gmmu_fault_buf_entry_replayable_fault_true_v(void)
+{
+	return 0x00000001;
+}
+static inline u32 gmmu_fault_buf_entry_replayable_fault_true_f(void)
+{
+	return 0x80;
+}
+static inline u32 gmmu_fault_buf_entry_client_v(u32 r)
+{
+	return (r >> 8) & 0x7f;
+}
+static inline u32 gmmu_fault_buf_entry_client_w(void)
+{
+	return 7;
+}
+static inline u32 gmmu_fault_buf_entry_access_type_v(u32 r)
+{
+	return (r >> 16) & 0xf;
+}
+static inline u32 gmmu_fault_buf_entry_access_type_w(void)
+{
+	return 7;
+}
+static inline u32 gmmu_fault_buf_entry_mmu_client_type_v(u32 r)
+{
+	return (r >> 20) & 0x1;
+}
+static inline u32 gmmu_fault_buf_entry_mmu_client_type_w(void)
+{
+	return 7;
+}
+static inline u32 gmmu_fault_buf_entry_gpc_id_v(u32 r)
+{
+	return (r >> 24) & 0x1f;
+}
+static inline u32 gmmu_fault_buf_entry_gpc_id_w(void)
+{
+	return 7;
+}
+static inline u32 gmmu_fault_buf_entry_protected_mode_v(u32 r)
+{
+	return (r >> 29) & 0x1;
+}
+static inline u32 gmmu_fault_buf_entry_protected_mode_w(void)
+{
+	return 7;
+}
+static inline u32 gmmu_fault_buf_entry_protected_mode_true_v(void)
+{
+	return 0x00000001;
+}
+static inline u32 gmmu_fault_buf_entry_protected_mode_true_f(void)
+{
+	return 0x20000000;
+}
+static inline u32 gmmu_fault_buf_entry_replayable_fault_en_v(u32 r)
+{
+	return (r >> 30) & 0x1;
+}
+static inline u32 gmmu_fault_buf_entry_replayable_fault_en_w(void)
+{
+	return 7;
+}
+static inline u32 gmmu_fault_buf_entry_replayable_fault_en_true_v(void)
+{
+	return 0x00000001;
+}
+static inline u32 gmmu_fault_buf_entry_replayable_fault_en_true_f(void)
+{
+	return 0x40000000;
+}
+static inline u32 gmmu_fault_buf_entry_valid_v(u32 r)
+{
+	return (r >> 31) & 0x1;
+}
+static inline u32 gmmu_fault_buf_entry_valid_w(void)
+{
+	return 7;
+}
+static inline u32 gmmu_fault_buf_entry_valid_true_v(void)
+{
+	return 0x00000001;
+}
+static inline u32 gmmu_fault_buf_entry_valid_true_f(void)
+{
+	return 0x80000000;
+}
 #endif

drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -710,10 +710,6 @@ static inline u32 ram_rl_entry_chan_inst_ptr_hi_f(u32 v)
 {
 	return (v & 0xffffffff) << 0;
 }
-static inline u32 ram_rl_entry_tsg_vmid_f(u32 v)
-{
-	return (v & 0xff) << 4;
-}
 static inline u32 ram_rl_entry_tsg_timeslice_scale_f(u32 v)
 {
 	return (v & 0xf) << 16;