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gpu: nvgpu: add support for ACB SLCG on gv11b

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Register list for ACB SLCG is auto generated with scripts.
Add HAL operations to enable/disable ACB clock gating.

Bug 200647909

Change-Id: I4be4c14cc072fcccd91031a5a40321f5ff11f549
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2420355
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Prateek sethi
2020-09-27 17:28:09 +05:30
committed by Alex Waterman
parent 995731171b
commit 223baa5883
5 changed files with 54 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
drivers/gpu/nvgpu/common/init/nvgpu_init.c
View File

@@ -542,6 +542,15 @@ static int nvgpu_init_syncpt_mem(struct gk20a *g)
return 0;
}
static int nvgpu_init_slcg_acb_load_gating_prod(struct gk20a *g)
{
if (g->ops.cg.slcg_acb_load_gating_prod != NULL) {
g->ops.cg.slcg_acb_load_gating_prod(g, true);
}
return 0;
}
static int nvgpu_init_interrupt_setup(struct gk20a *g)
{
/**
@@ -584,6 +593,8 @@ int nvgpu_finalize_poweron(struct gk20a *g)
* and static variables require constant literals for initializers.
*/
const struct nvgpu_init_table_t nvgpu_init_table[] = {
NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_slcg_acb_load_gating_prod,
NO_FLAG),
/*
* ECC support initialization is split into generic init
* followed by per unit initialization and ends with sysfs

1
drivers/gpu/nvgpu/hal/init/hal_gv11b.c
View File

@@ -785,6 +785,7 @@ static const struct gops_cg gv11b_ops_cg = {
.slcg_therm_load_gating_prod = gv11b_slcg_therm_load_gating_prod,
.slcg_xbar_load_gating_prod = gv11b_slcg_xbar_load_gating_prod,
.slcg_hshub_load_gating_prod = gv11b_slcg_hshub_load_gating_prod,
.slcg_acb_load_gating_prod = gv11b_slcg_acb_load_gating_prod,
.blcg_bus_load_gating_prod = gv11b_blcg_bus_load_gating_prod,
.blcg_ce_load_gating_prod = gv11b_blcg_ce_load_gating_prod,
.blcg_fb_load_gating_prod = gv11b_blcg_fb_load_gating_prod,

34
drivers/gpu/nvgpu/hal/power_features/cg/gv11b_gating_reglist.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -156,6 +156,11 @@ static const struct gating_desc gv11b_slcg_hshub[] = {
{.addr = 0x001fbbf4U, .prod = 0x00000000U, .disable = 0xfffffffeU},
};
/* slcg Acb */
static const struct gating_desc gv11b_slcg_acb[] = {
{.addr = 0x0010e48cU, .prod = 0x00000038U, .disable = 0x0000003eU},
};
/* blcg bus */
static const struct gating_desc gv11b_blcg_bus[] = {
{.addr = 0x00001c00U, .prod = 0x00000042U, .disable = 0x00000000U},
@@ -614,6 +619,33 @@ const struct gating_desc *gv11b_slcg_hshub_get_gating_prod(void)
return gv11b_slcg_hshub;
}
void gv11b_slcg_acb_load_gating_prod(struct gk20a *g,
bool prod)
{
u32 i;
u32 size = nvgpu_safe_cast_u64_to_u32(sizeof(gv11b_slcg_acb)
/ GATING_DESC_SIZE);
if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
for (i = 0; i < size; i++) {
u32 reg = gv11b_slcg_acb[i].addr;
u32 val = prod ? gv11b_slcg_acb[i].prod :
gv11b_slcg_acb[i].disable;
nvgpu_writel(g, reg, val);
}
}
}
u32 gv11b_slcg_acb_gating_prod_size(void)
{
return nvgpu_safe_cast_u64_to_u32(ARRAY_SIZE(gv11b_slcg_acb));
}
const struct gating_desc *gv11b_slcg_acb_get_gating_prod(void)
{
return gv11b_slcg_acb;
}
void gv11b_blcg_bus_load_gating_prod(struct gk20a *g,
bool prod)
{

11
drivers/gpu/nvgpu/hal/power_features/cg/gv11b_gating_reglist.h
View File

@@ -22,8 +22,8 @@
* This file is autogenerated. Do not edit.
*/
#ifndef NVGPU_CG_GV11B_GATING_REGLIST_H
#define NVGPU_CG_GV11B_GATING_REGLIST_H
#ifndef GV11B_GATING_REGLIST_H
#define GV11B_GATING_REGLIST_H
#include <nvgpu/types.h>
@@ -95,6 +95,11 @@ void gv11b_slcg_hshub_load_gating_prod(struct gk20a *g,
u32 gv11b_slcg_hshub_gating_prod_size(void);
const struct gating_desc *gv11b_slcg_hshub_get_gating_prod(void);
void gv11b_slcg_acb_load_gating_prod(struct gk20a *g,
bool prod);
u32 gv11b_slcg_acb_gating_prod_size(void);
const struct gating_desc *gv11b_slcg_acb_get_gating_prod(void);
void gv11b_blcg_bus_load_gating_prod(struct gk20a *g,
bool prod);
u32 gv11b_blcg_bus_gating_prod_size(void);
@@ -140,4 +145,4 @@ void gv11b_blcg_hshub_load_gating_prod(struct gk20a *g,
u32 gv11b_blcg_hshub_gating_prod_size(void);
const struct gating_desc *gv11b_blcg_hshub_get_gating_prod(void);
#endif /* NVGPU_CG_GV11B_GATING_REGLIST_H */
#endif /* GV11B_GATING_REGLIST_H */

1
drivers/gpu/nvgpu/include/nvgpu/gops/cg.h
View File

@@ -51,6 +51,7 @@ struct gops_cg {
void (*slcg_therm_load_gating_prod)(struct gk20a *g, bool prod);
void (*slcg_xbar_load_gating_prod)(struct gk20a *g, bool prod);
void (*slcg_hshub_load_gating_prod)(struct gk20a *g, bool prod);
void (*slcg_acb_load_gating_prod)(struct gk20a *g, bool prod);
void (*blcg_bus_load_gating_prod)(struct gk20a *g, bool prod);
void (*blcg_ce_load_gating_prod)(struct gk20a *g, bool prod);
void (*blcg_fb_load_gating_prod)(struct gk20a *g, bool prod);