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gpu: nvgpu: add PDI for TU104 (Linux)
Add reporting for the per-device identifier (PDI) in the Linux GPU characteristics. Implement PDI read for TU104. Bug 2957580 Signed-off-by: Sami Kiminki <skiminki@nvidia.com> Change-Id: I6ac0e4f74378564d82955b431d4c1fd6c0daeb13 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2346933 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Lakshmanan M <lm@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
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committed by
Alex Waterman
parent
8d68e687f0
commit
23cda4f4a9
@@ -959,6 +959,12 @@ struct gk20a {
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u16 pci_class;
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u8 pci_revision;
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/**
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* The per-device identifier. The iGPUs without a PDI will use
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* the SoC PDI if one exists. Zero if neither exists.
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*/
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u64 per_device_identifier;
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/*
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* PCI power management: i2c device index, port and address for
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* INA3221.
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@@ -193,6 +193,28 @@ struct gops_fuse {
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int (*read_vin_cal_gain_offset_fuse)(struct gk20a *g,
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u32 vin_id, s8 *gain,
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s8 *offset);
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/**
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* @brief Read the 64-bit per-device identifier (PDI).
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*
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* On GPUs where available, the HAL reads NV_FUSE_OPT_PDI_0
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* and NV_FUSE_OPT_PDI_1. Combined, these give the 64-bit
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* per-device identifier (PDI).
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*
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* On GP10B/GV11B, this function reads the 64-bit SoC PDI from
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* FUSE_PDI0 and FUSE_PDI1.
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*
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* Null PDI (0) is returned when the device does not have a
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* PDI. Errors are returned when there was an error
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* determining the PDI.
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*
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* @param g [in] The GPU driver struct.
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* @param val [out] Pointer to receive the PDI on success.
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*
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* @return 0 on success.
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*/
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int (*read_per_device_identifier)(struct gk20a *g, u64 *pdi);
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#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
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#include "include/nvgpu/nvgpu_next_gops_fuse.h"
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#endif
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -72,7 +72,9 @@
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(nvgpu_safe_add_u32(0x00021d70U, nvgpu_safe_mult_u32((i), 4U)))
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#define fuse_status_opt_fbp_r() (0x00021d38U)
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#define fuse_status_opt_fbp_idx_v(r, i)\
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(((r) >> (0U + i*1U)) & 0x1U)
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(((r) >> (0U + (i)*1U)) & 0x1U)
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#define fuse_opt_ecc_en_r() (0x00021228U)
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#define fuse_opt_feature_fuses_override_disable_r() (0x000213f0U)
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#define fuse_opt_pdi_0_r() (0x00021344U)
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#define fuse_opt_pdi_1_r() (0x00021348U)
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#endif
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