gpu: nvgpu: SEC2 RTOS support s/w init

-Created struct nvgpu_sec2 to hold members
 related to SEC2-RTOS ucode support in header file
 sec2.h
-Created nvgpu_sec2 variable under struct gk20a.
-Created NVGPU_SUPPORT_SEC2_RTOS enable flag
 to enable SEC2 RTOS support.
-Defined method nvgpu_init_sec2_support() to
 init SEC2 RTOS support by performing s/w setup like
 mutex-init, sequence-init & add support
 for remove_support.
-Defined method nvgpu_sec2_destroy() to deinit
 SEC2 RTOS support.
-Added nvgpu_init_sec2_support()/nvgpu_sec2_destroy()
 as part gk20a_finalize_poweron()/gk20a_prepare_poweroff()
 sequence based on NVGPU_SUPPORT_SEC2_RTOS enable flag
-Assigned g->sec2->flcn to point to g->sec2_flcn to access
 falcon.
-Made Makefile changes to include sec2.c to build

JIRA NVGPUT-80

Change-Id: Icdc8c25994e305427ad465a5a20e9ce533759a9e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1791955
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2018-09-17 14:29:41 +05:30
committed by mobile promotions
parent 18f80ca25c
commit 24f47f0de8
8 changed files with 250 additions and 1 deletions

View File

@@ -93,6 +93,10 @@ int gk20a_prepare_poweroff(struct gk20a *g)
ret |= nvgpu_pmu_destroy(g);
}
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_SEC2_RTOS)) {
ret |= nvgpu_sec2_destroy(g);
}
ret |= gk20a_gr_suspend(g);
ret |= nvgpu_mm_suspend(g);
ret |= gk20a_fifo_suspend(g);
@@ -313,6 +317,14 @@ int gk20a_finalize_poweron(struct gk20a *g)
}
}
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_SEC2_RTOS)) {
err = nvgpu_init_sec2_support(g);
if (err != 0) {
nvgpu_err(g, "failed to init sec2");
goto done;
}
}
if (g->ops.pmu.is_pmu_supported(g)) {
err = nvgpu_init_pmu_support(g);
if (err) {