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gpu: nvgpu: arb: fix rounding in effective clocks

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Current code cast casting the frequency to 16 bit
before division, giving out incorrect data

JIRA DNVGPU-164

Change-Id: I4eb1fa73fb9e8963f550d3d853db39b49b990fa4
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1251663
(cherry picked from commit c0d91a054f8278af9a2383bb3f837465779132a9)
Reviewed-on: http://git-master/r/1274546
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
David Nieto
2016-11-10 22:50:20 -08:00
committed by Deepak Nibade
parent cd25b20236
commit 26265b9974
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/nvgpu/gp106/clk_gp106.c
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@@ -67,7 +67,8 @@ static u16 gp106_clk_get_rate(struct gk20a *g, u32 api_domain)
freq_khz = c->is_counter ? c->scale * gp106_get_rate_cntr(g, c) :
0; /* TODO: PLL read */
return (u16) freq_khz/1000;
/* Convert to MHZ */
return (u16) (freq_khz/1000);
}
static int gp106_init_clk_support(struct gk20a *g) {