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gpu: nvgpu: Fix HAL checker pointed mismatches

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Add new HALs for register field definition/value changes in
GV11B as compared to Pascal. Update the HALs for recent
chips too if applicable.

Bug 200604892

Change-Id: I14ee9440859007e86a1ffa937df399a31e2628bd
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2437564
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
tkudav
2020-10-28 18:12:30 +05:30
committed by Alex Waterman
parent e962ec3fa0
commit 2ca4f145e4
40 changed files with 173 additions and 319 deletions
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4
userspace/units/mm/hal/cache/flush_gk20a_fusa/flush-gk20a-fusa.c vendored
View File

@@ -36,7 +36,7 @@
#include "hal/fb/fb_gv11b.h"
#include "hal/fb/intr/fb_intr_gv11b.h"
#include "hal/fifo/ramin_gk20a.h"
#include "hal/fifo/ramin_gp10b.h"
#include "hal/fifo/ramin_gv11b.h"
#include "hal/mm/cache/flush_gk20a.h"
#include "hal/mm/gmmu/gmmu_gp10b.h"
#include "hal/mm/mm_gp10b.h"
@@ -131,7 +131,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g)
nvgpu_gmmu_default_big_page_size;
g->ops.mm.init_inst_block = gv11b_mm_init_inst_block;
g->ops.mm.gmmu.get_mmu_levels = gp10b_mm_get_mmu_levels;
g->ops.ramin.init_pdb = gp10b_ramin_init_pdb;
g->ops.ramin.init_pdb = gv11b_ramin_init_pdb;
g->ops.ramin.alloc_size = gk20a_ramin_alloc_size;
g->ops.mm.setup_hw = nvgpu_mm_setup_hw;
g->ops.fb.init_hw = gv11b_fb_init_hw;

4
userspace/units/mm/hal/cache/flush_gv11b_fusa/flush-gv11b-fusa.c vendored
View File

@@ -37,7 +37,7 @@
#include "hal/fb/fb_gv11b.h"
#include "hal/fb/intr/fb_intr_gv11b.h"
#include "hal/fifo/ramin_gk20a.h"
#include "hal/fifo/ramin_gp10b.h"
#include "hal/fifo/ramin_gv11b.h"
#include "hal/mm/cache/flush_gk20a.h"
#include "hal/mm/gmmu/gmmu_gp10b.h"
#include "hal/mm/mm_gp10b.h"
@@ -120,7 +120,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g)
nvgpu_gmmu_default_big_page_size;
g->ops.mm.init_inst_block = gv11b_mm_init_inst_block;
g->ops.mm.gmmu.get_mmu_levels = gp10b_mm_get_mmu_levels;
g->ops.ramin.init_pdb = gp10b_ramin_init_pdb;
g->ops.ramin.init_pdb = gv11b_ramin_init_pdb;
g->ops.ramin.alloc_size = gk20a_ramin_alloc_size;
g->ops.mm.setup_hw = nvgpu_mm_setup_hw;
g->ops.fb.init_hw = gv11b_fb_init_hw;