nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-25 02:52:51 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: add gr.falcon hal function to target section

Browse Source 
Add gr.falcon hal functions being used from gr.falcon
unit test to the target section.

Jira NVGPU-4888

Change-Id: Id90ac8babfae95805421e4b9aded6a055e10e85b
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280795
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
vinodg
2020-01-17 17:36:53 -08:00
committed by Alex Waterman
parent 0003c7d13e
commit 2ea4dfb5c7
1 changed files with 19 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

29
userspace/units/gr/falcon/nvgpu-gr-falcon.h
View File

@@ -40,9 +40,14 @@ struct unit_module;
*
* Test Type: Feature, Error injection
*
* Targets: #nvgpu_gr_falcon_init_support,
* #nvgpu_gr_falcon_load_secure_ctxsw_ucode,
* gops_gr_falcon.load_ctxsw_ucode
* Targets: nvgpu_gr_falcon_init_support,
* nvgpu_gr_falcon_load_secure_ctxsw_ucode,
* gops_gr_falcon.load_ctxsw_ucode,
* gops_gr_falcon.get_fecs_ctx_state_store_major_rev_id,
* gm20b_gr_falcon_get_fecs_ctx_state_store_major_rev_id,
* gm20b_gr_falcon_get_gpccs_start_reg_offset,
* gm20b_gr_falcon_start_gpccs,
* gm20b_gr_falcon_gpccs_base_addr
*
* Input: #test_gr_init_setup_ready must have been executed successfully.
*
@@ -68,7 +73,7 @@ int test_gr_falcon_init(struct unit_module *m,
*
* Test Type: Feature, Error injection
*
* Targets: #nvgpu_gr_falcon_remove_support
* Targets: nvgpu_gr_falcon_remove_support
*
* Input: #test_gr_falcon_init must have been executed successfully.
*
@@ -90,7 +95,9 @@ int test_gr_falcon_deinit(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: #nvgpu_gr_falcon_init_ctxsw
* Targets: #nvgpu_gr_falcon_init_ctxsw,
* gm20b_gr_falcon_bind_instblk
* nvgpu_gr_checksum_u32
*
* Input: #test_gr_falcon_init must have been executed successfully.
*
@@ -113,7 +120,9 @@ int test_gr_falcon_init_ctxsw(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: #nvgpu_gr_falcon_init_ctx_state
* Targets: nvgpu_gr_falcon_init_ctx_state,
* gm20b_gr_falcon_init_ctx_state,
* gp10b_gr_falcon_init_ctx_state
*
* Input: #test_gr_falcon_init must have been executed successfully.
*
@@ -134,9 +143,9 @@ int test_gr_falcon_init_ctx_state(struct unit_module *m,
*
* Test Type: Feature
*
* Targets: #nvgpu_gr_falcon_get_fecs_ucode_segments,
* #nvgpu_gr_falcon_get_gpccs_ucode_segments,
* #nvgpu_gr_falcon_get_surface_desc_cpu_va
* Targets: nvgpu_gr_falcon_get_fecs_ucode_segments,
* nvgpu_gr_falcon_get_gpccs_ucode_segments,
* nvgpu_gr_falcon_get_surface_desc_cpu_va
*
* Input: #test_gr_falcon_init must have been executed successfully.
*
@@ -159,7 +168,7 @@ int test_gr_falcon_query_test(struct unit_module *m,
*
* Test Type: Error injection
*
* Targets: #nvgpu_gr_falcon_init_ctxsw_ucode,
* Targets: nvgpu_gr_falcon_init_ctxsw_ucode,
* gops_gr_falcon.load_ctxsw_ucode
*
* Input: #test_gr_falcon_init must have been executed successfully.