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gpu: nvgpu: Skip graphics CB programming for MIG

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Added logic to skip the following graphics CB allocation, map and
programming sequence when MIG is enabled.

Global CB:
1) NVGPU_GR_GLOBAL_CTX_CIRCULAR
2) NVGPU_GR_GLOBAL_CTX_PAGEPOOL
3) NVGPU_GR_GLOBAL_CTX_ATTRIBUTE
4) NVGPU_GR_GLOBAL_CTX_CIRCULAR_VPR
5) NVGPU_GR_GLOBAL_CTX_PAGEPOOL_VPR
6) NVGPU_GR_GLOBAL_CTX_ATTRIBUTE_VPR
7) NVGPU_GR_GLOBAL_CTX_RTV_CIRCULAR_BUFFER

CTX CB:
1) NVGPU_GR_CTX_CIRCULAR_VA
2) NVGPU_GR_CTX_PAGEPOOL_VA
3) NVGPU_GR_CTX_ATTRIBUTE_VA
4) NVGPU_GR_CTX_RTV_CIRCULAR_BUFFER_VA

JIRA NVGPU-5650

Change-Id: I38c2859ce57ad76c58a772fdf9f589f2106149af
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2423450
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Lakshmanan M
2020-10-05 13:38:53 +05:30
committed by Alex Waterman
parent c9a964aefd
commit 2ecb5feaad
9 changed files with 231 additions and 154 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/nvgpu/common/gr/gr_setup.c
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@@ -355,10 +355,12 @@ int nvgpu_gr_setup_set_preemption_mode(struct nvgpu_channel *ch,
nvgpu_gr_obj_ctx_update_ctxsw_preemption_mode(g, gr->config, gr_ctx,
ch->subctx);
nvgpu_gr_ctx_patch_write_begin(g, gr_ctx, true);
g->ops.gr.init.commit_global_cb_manager(g, gr->config, gr_ctx,
true);
nvgpu_gr_ctx_patch_write_end(g, gr_ctx, true);
if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) {
nvgpu_gr_ctx_patch_write_begin(g, gr_ctx, true);
g->ops.gr.init.commit_global_cb_manager(g, gr->config, gr_ctx,
true);
nvgpu_gr_ctx_patch_write_end(g, gr_ctx, true);
}
g->ops.tsg.enable(tsg);