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gpu: nvgpu: move emc frequency floor setup under CONFIG_TEGRA_BWMGR

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API to set/remove emc frequency floor is defined under the config
CONFIG_TEGRA_BWMGR. Add that config guard in railgate/unrailgate.

Bug 200602747

Change-Id: I375f266a9926dc525102178761ffeade47cc6a66
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2423517
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2020-10-05 16:52:32 +05:30
committed by Alex Waterman
parent a331fd4b3a
commit c9a964aefd
2 changed files with 26 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c
View File

@@ -293,7 +293,7 @@ void gp10b_tegra_clks_control(struct device *dev, bool enable)
static int gp10b_tegra_railgate(struct device *dev)
{
#ifdef TEGRA186_POWER_DOMAIN_GPU
#ifdef CONFIG_TEGRA_BWMGR
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct gk20a_scale_profile *profile = platform->g->scale_profile;
@@ -302,7 +302,9 @@ static int gp10b_tegra_railgate(struct device *dev)
tegra_bwmgr_set_emc(
(struct tegra_bwmgr_client *)profile->private_data,
0, TEGRA_BWMGR_SET_EMC_FLOOR);
#endif
#ifdef TEGRA186_POWER_DOMAIN_GPU
if (tegra_bpmp_running() &&
tegra_powergate_is_powered(TEGRA186_POWER_DOMAIN_GPU)) {
gp10b_tegra_clks_control(dev, false);
@@ -317,24 +319,29 @@ static int gp10b_tegra_railgate(struct device *dev)
static int gp10b_tegra_unrailgate(struct device *dev)
{
int ret = 0;
#ifdef TEGRA186_POWER_DOMAIN_GPU
#ifdef CONFIG_TEGRA_BWMGR
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct gk20a_scale_profile *profile = platform->g->scale_profile;
#endif
#ifdef TEGRA186_POWER_DOMAIN_GPU
if (tegra_bpmp_running()) {
ret = tegra_unpowergate_partition(TEGRA186_POWER_DOMAIN_GPU);
gp10b_tegra_clks_control(dev, true);
}
#else
gp10b_tegra_clks_control(dev, true);
#endif
#ifdef CONFIG_TEGRA_BWMGR
/* to start with set emc frequency floor to max rate*/
if (profile)
tegra_bwmgr_set_emc(
(struct tegra_bwmgr_client *)profile->private_data,
tegra_bwmgr_get_max_emc_rate(),
TEGRA_BWMGR_SET_EMC_FLOOR);
#else
gp10b_tegra_clks_control(dev, true);
#endif
return ret;
}

20
drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c
View File

@@ -166,16 +166,21 @@ static bool gv11b_tegra_is_railgated(struct device *dev)
static int gv11b_tegra_railgate(struct device *dev)
{
#ifdef TEGRA194_POWER_DOMAIN_GPU
struct gk20a *g = get_gk20a(dev);
#endif
#ifdef CONFIG_TEGRA_BWMGR
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct gk20a_scale_profile *profile = platform->g->scale_profile;
struct gk20a *g = get_gk20a(dev);
/* remove emc frequency floor */
if (profile)
tegra_bwmgr_set_emc(
(struct tegra_bwmgr_client *)profile->private_data,
0, TEGRA_BWMGR_SET_EMC_FLOOR);
#endif
#ifdef TEGRA194_POWER_DOMAIN_GPU
if (tegra_bpmp_running()) {
nvgpu_log(g, gpu_dbg_info, "bpmp running");
if (!tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU)) {
@@ -197,10 +202,12 @@ static int gv11b_tegra_railgate(struct device *dev)
static int gv11b_tegra_unrailgate(struct device *dev)
{
int ret = 0;
#ifdef TEGRA194_POWER_DOMAIN_GPU
#ifdef CONFIG_TEGRA_BWMGR
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct gk20a *g = get_gk20a(dev);
struct gk20a_scale_profile *profile = platform->g->scale_profile;
#endif
#ifdef TEGRA194_POWER_DOMAIN_GPU
struct gk20a *g = get_gk20a(dev);
if (tegra_bpmp_running()) {
nvgpu_log(g, gpu_dbg_info, "bpmp running");
@@ -214,16 +221,19 @@ static int gv11b_tegra_unrailgate(struct device *dev)
} else {
nvgpu_log(g, gpu_dbg_info, "bpmp not running");
}
#else
gp10b_tegra_clks_control(dev, true);
#endif
#ifdef CONFIG_TEGRA_BWMGR
/* to start with set emc frequency floor to max rate*/
if (profile)
tegra_bwmgr_set_emc(
(struct tegra_bwmgr_client *)profile->private_data,
tegra_bwmgr_get_max_emc_rate(),
TEGRA_BWMGR_SET_EMC_FLOOR);
#else
gp10b_tegra_clks_control(dev, true);
#endif
return ret;
}