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gpu: nvgpu: extend engine_info for nvgpu-next

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Extend engine_info for nvgpu-next.

JIRA NVGPU-4970

Change-Id: I0e8e5ae9361776a48972ae6d0cee84ece19d7590
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291811
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2020-02-07 15:08:29 -08:00
committed by Alex Waterman
parent 5137e51da8
commit 31ba194a85
3 changed files with 28 additions and 1 deletions
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7
drivers/gpu/nvgpu/common/fifo/engines.c
View File

@@ -44,6 +44,10 @@
#include <nvgpu/static_analysis.h>
#include <nvgpu/gops_mc.h>
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
#include "nvgpu_next_gpuid.h"
#endif
#define FECS_METHOD_WFI_RESTORE 0x80000U
enum nvgpu_fifo_engine nvgpu_engine_enum_from_type(struct gk20a *g,
@@ -831,6 +835,9 @@ int nvgpu_engine_init_info(struct nvgpu_fifo *f)
info->pri_base = dev_info.pri_base;
info->engine_enum = engine_enum;
info->fault_id = dev_info.fault_id;
#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
NVGPU_NEXT_INIT_GR_INFO(g, info, &dev_info);
#endif
/* engine_id starts from 0 to NV_HOST_NUM_ENGINES */
f->active_engines_list[f->num_engines] = dev_info.engine_id;

7
drivers/gpu/nvgpu/hal/fifo/engines_gp10b_fusa.c
View File

@@ -31,6 +31,10 @@
#include "engines_gp10b.h"
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
#include "nvgpu_next_gpuid.h"
#endif
int gp10b_engine_init_ce_info(struct nvgpu_fifo *f)
{
struct gk20a *g = f->g;
@@ -105,6 +109,9 @@ int gp10b_engine_init_ce_info(struct nvgpu_fifo *f)
info->inst_id = dev_info.inst_id;
info->pri_base = dev_info.pri_base;
info->engine_id = dev_info.engine_id;
#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
NVGPU_NEXT_INIT_GR_INFO(g, info, &dev_info);
#endif
/* engine_id starts from 0 to NV_HOST_NUM_ENGINES */
f->active_engines_list[f->num_engines] =

15
drivers/gpu/nvgpu/include/nvgpu/engines.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -30,6 +30,12 @@
#include <nvgpu/types.h>
/** @cond DOXYGEN_SHOULD_SKIP_THIS */
#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
#include "include/nvgpu/nvgpu_next_engines.h"
#endif
/** @endcond DOXYGEN_SHOULD_SKIP_THIS */
/**
* Invalid engine id value.
*/
@@ -94,6 +100,13 @@ struct nvgpu_engine_info {
u32 fault_id;
/** Engine enum type used for s/w purpose. */
enum nvgpu_fifo_engine engine_enum;
/** @cond DOXYGEN_SHOULD_SKIP_THIS */
#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
/* nvgpu next engine info additions */
struct nvgpu_next_engine_info nvgpu_next;
#endif
/** @endcond DOXYGEN_SHOULD_SKIP_THIS */
};
/**
* @brief Get s/w defined engine enum type for engine enum type defined by h/w.