gpu: nvgpu: use correct APIs for disable and preempt

In gr_gk20a_ctx_zcull_setup(), gr_gk20a_update_smpc_ctxsw_mode(),
and in gk20a_channel_suspend(), we call channel specific APIs
to disable/preempt/enable channel
But we do not consider TSGs in this case

Hence use correct (below) APIs in above functions which
will handle channel or TSG internally :
gk20a_disable_channel_tsg()
gk20a_fifo_preempt()
gk20a_enable_channel_tsg()

Bug 200205041

Change-Id: Ieed378dac4ad2322b35f9102706176ec326d386c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1157189
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Deepak Nibade
2016-05-31 17:55:20 +05:30
committed by Terje Bergstrom
parent 9d13ddc17d
commit 31fa6773ef
2 changed files with 20 additions and 12 deletions

View File

@@ -2772,9 +2772,9 @@ int gk20a_channel_suspend(struct gk20a *g)
if (gk20a_channel_get(ch)) {
gk20a_dbg_info("suspend channel %d", chid);
/* disable channel */
g->ops.fifo.disable_channel(ch);
gk20a_disable_channel_tsg(g, ch);
/* preempt the channel */
g->ops.fifo.preempt_channel(g, chid);
gk20a_fifo_preempt(g, ch);
gk20a_channel_cancel_job_clean_up(ch, true);
/* wait for channel update notifiers */
if (ch->update_fn)

View File

@@ -764,12 +764,15 @@ static int gr_gk20a_ctx_zcull_setup(struct gk20a *g, struct channel_gk20a *c)
va_hi = u64_hi32(ch_ctx->zcull_ctx.gpu_va);
va = ((va_lo >> 8) & 0x00FFFFFF) | ((va_hi << 24) & 0xFF000000);
c->g->ops.fifo.disable_channel(c);
ret = c->g->ops.fifo.preempt_channel(c->g, c->hw_chid);
ret = gk20a_disable_channel_tsg(g, c);
if (ret) {
c->g->ops.fifo.enable_channel(c);
gk20a_err(dev_from_gk20a(g),
"failed to disable gr engine activity\n");
gk20a_err(dev_from_gk20a(g), "failed to disable channel/TSG\n");
goto clean_up;
}
ret = gk20a_fifo_preempt(g, c);
if (ret) {
gk20a_enable_channel_tsg(g, c);
gk20a_err(dev_from_gk20a(g), "failed to preempt channel/TSG\n");
goto clean_up;
}
@@ -780,7 +783,7 @@ static int gr_gk20a_ctx_zcull_setup(struct gk20a *g, struct channel_gk20a *c)
gk20a_mem_wr(g, mem,
ctxsw_prog_main_image_zcull_ptr_o(), va);
c->g->ops.fifo.enable_channel(c);
gk20a_enable_channel_tsg(g, c);
clean_up:
gk20a_mem_end(g, mem);
@@ -1617,10 +1620,15 @@ int gr_gk20a_update_smpc_ctxsw_mode(struct gk20a *g,
mem = &ch_ctx->gr_ctx->mem;
c->g->ops.fifo.disable_channel(c);
ret = c->g->ops.fifo.preempt_channel(c->g, c->hw_chid);
ret = gk20a_disable_channel_tsg(g, c);
if (ret) {
gk20a_err(dev_from_gk20a(g), "failed to preempt channel");
gk20a_err(dev_from_gk20a(g), "failed to disable channel/TSG\n");
goto out;
}
ret = gk20a_fifo_preempt(g, c);
if (ret) {
gk20a_enable_channel_tsg(g, c);
gk20a_err(dev_from_gk20a(g), "failed to preempt channel/TSG\n");
goto out;
}
@@ -1646,7 +1654,7 @@ int gr_gk20a_update_smpc_ctxsw_mode(struct gk20a *g,
gk20a_mem_end(g, mem);
out:
c->g->ops.fifo.enable_channel(c);
gk20a_enable_channel_tsg(g, c);
return ret;
}