mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-24 10:34:43 +03:00
gpu: nvgpu: add NVGPU_SUPPORT_PLC flag
Add NVGPU_SUPPORT_PLC to indicate if compression PLC is supported in nvgpu. Add corresponding GPU characteristics flag and IOCTL mapping to sync compression support status with nvrm_gpu. JIRA NVGPU-4666 Change-Id: I63307b99ceac7dc2e6af143ca13cdac63e253ed3 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2340242 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
This commit is contained in:
committed by
Alex Waterman
parent
2a3bb9107f
commit
32bdf8cc2d
@@ -258,10 +258,13 @@ struct gk20a;
|
||||
/** SM TTU is enabled */
|
||||
#define NVGPU_SUPPORT_SM_TTU 88U
|
||||
|
||||
/** PLC Compression */
|
||||
#define NVGPU_SUPPORT_PLC 89U
|
||||
|
||||
/*
|
||||
* Must be greater than the largest bit offset in the above list.
|
||||
*/
|
||||
#define NVGPU_MAX_ENABLED_BITS 89U
|
||||
#define NVGPU_MAX_ENABLED_BITS 90U
|
||||
|
||||
/**
|
||||
* @brief Check if the passed flag is enabled.
|
||||
|
||||
Reference in New Issue
Block a user