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gpu: nvgpu: posix: Pass atomic types to atomic ops

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Atomic functions require the type of manipulated atomic to be of
_Atomic type.

Change-Id: I8cf417a2b15ef34488b82560b65d5abfbe67fde8
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318385
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2020-03-25 10:38:10 -07:00
committed by Alex Waterman
parent 6d4e4f633f
commit 32db53d4e1
1 changed files with 8 additions and 4 deletions
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12
drivers/gpu/nvgpu/os/posix/bitmap.c
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@@ -230,7 +230,8 @@ bool nvgpu_test_bit(unsigned int nr, const volatile unsigned long *addr)
bool nvgpu_test_and_set_bit(unsigned int nr, volatile unsigned long *addr)
{
unsigned long mask = BIT_MASK(nr);
volatile unsigned long *p = addr + BIT_WORD(nr);
volatile unsigned _Atomic long *p =
(volatile unsigned _Atomic long *)addr + BIT_WORD(nr);
return (atomic_fetch_or(p, mask) & mask) != 0ULL;
}
@@ -238,7 +239,8 @@ bool nvgpu_test_and_set_bit(unsigned int nr, volatile unsigned long *addr)
bool nvgpu_test_and_clear_bit(unsigned int nr, volatile unsigned long *addr)
{
unsigned long mask = BIT_MASK(nr);
volatile unsigned long *p = addr + BIT_WORD(nr);
volatile unsigned _Atomic long *p =
(volatile unsigned _Atomic long *)addr + BIT_WORD(nr);
return (atomic_fetch_and(p, ~mask) & mask) != 0ULL;
}
@@ -246,7 +248,8 @@ bool nvgpu_test_and_clear_bit(unsigned int nr, volatile unsigned long *addr)
void nvgpu_set_bit(unsigned int nr, volatile unsigned long *addr)
{
unsigned long mask = BIT_MASK(nr);
volatile unsigned long *p = addr + BIT_WORD(nr);
volatile unsigned _Atomic long *p =
(unsigned volatile _Atomic long *)addr + BIT_WORD(nr);
(void)atomic_fetch_or(p, mask);
}
@@ -254,7 +257,8 @@ void nvgpu_set_bit(unsigned int nr, volatile unsigned long *addr)
void nvgpu_clear_bit(unsigned int nr, volatile unsigned long *addr)
{
unsigned long mask = BIT_MASK(nr);
volatile unsigned long *p = addr + BIT_WORD(nr);
volatile unsigned _Atomic long *p =
(volatile unsigned _Atomic long *)addr + BIT_WORD(nr);
(void)atomic_fetch_and(p, ~mask);
}