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gpu: nvgpu: trigger gpc reset from common.gr

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GPC reset is right now triggered from common.mc unit for NVGPU_NEXT.
Move the triggers to common code in common.gr unit. This way it is much
more cleaner to handle multiple GR instances (added in subsequent patch)

Hardcode GR engine instance to 0 for now since by default there is only
one GR engine instance.

Jira NVGPU-5648

Change-Id: I3fd4d0a50db5a8c4b3decf1df881af323cea50c1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2403549
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2020-08-25 12:29:30 +05:30
committed by Alex Waterman
parent 38ce6fa717
commit 34c24873a7
1 changed files with 19 additions and 3 deletions
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22
drivers/gpu/nvgpu/common/gr/gr.c
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@@ -611,12 +611,28 @@ static int gr_init_prepare_hw(struct gk20a *g)
#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT) #if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
int err; int err;
if (g->ops.mc.reset_engine != NULL) { if (g->ops.gr.init.reset_gpcs != NULL) {
const struct nvgpu_device *dev =
nvgpu_device_get(g, NVGPU_DEVTYPE_GRAPHICS, 0);
g->ops.mc.reset(g, g->ops.mc.reset_mask(g, NVGPU_UNIT_PERFMON)); g->ops.mc.reset(g, g->ops.mc.reset_mask(g, NVGPU_UNIT_PERFMON));
err = nvgpu_next_mc_reset_engine(g, NVGPU_DEVTYPE_GRAPHICS); err = g->ops.mc.reset_engine_enable(g, dev->reset_id, false);
if (err != 0) { if (err != 0) {
nvgpu_err(g, "NVGPU_ENGINE_GR reset failed"); nvgpu_err(g, "GR reset disable failed");
return err;
}
err = g->ops.gr.init.reset_gpcs(g);
if (err != 0) {
nvgpu_err(g, "GR reset GPCs failed");
g->ops.mc.reset_engine_enable(g, dev->reset_id, true);
return err;
}
err = g->ops.mc.reset_engine_enable(g, dev->reset_id, true);
if (err != 0) {
nvgpu_err(g, "GR reset enable failed");
return err; return err;
} }
} else { } else {