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gpu: nvgpu: add accessors for PFIFO LB error

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Add missing register related PFIFO LB error for gv11b.

Jira NVGPU-3087

Change-Id: I38e844b2c750548445911047c2ce3e61f0a8f866
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2088755
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Rajesh Devaraj
2019-04-03 16:58:49 +05:30
committed by mobile promotions
parent 5fd2175509
commit 369bf0f15b
1 changed files with 5 additions and 1 deletions
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6
drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -258,6 +258,10 @@ static inline u32 fifo_intr_chsw_error_r(void)
{
return 0x0000256cU;
}
static inline u32 fifo_intr_lb_error_r(void)
{
return 0x0000258cU;
}
static inline u32 fifo_intr_ctxsw_timeout_r(void)
{
return 0x00002a30U;