gpu: nvgpu: Add traceability and UTS in ACR and PMU

- Add unit test specification for PMU unit
- Updated unit test specifcation in ACR unit and add
  traceability from test to design.

JIRA NVGPU-4319
JIRA NVGPU-2192

Change-Id: Ic483ec18844cb828002ed7d354cf112f3ea03898
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289559
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>

userspace/SWUTS.h

@@ -151,6 +151,6 @@
  *   - @ref SWUTS-gr-config
  *   - @ref SWUTS-ecc
  *   - @ref SWUTS-channel_devctl_qnx
- *
+ *   - @ref SWUTS-pmu
  */
 

userspace/SWUTS.sources

@@ -122,3 +122,4 @@ INPUT += ../../../userspace/units/gr/ctx/nvgpu-gr-ctx.h
 INPUT += ../../../userspace/units/gr/obj_ctx/nvgpu-gr-obj-ctx.h
 INPUT += ../../../userspace/units/gr/config/nvgpu-gr-config.h
 INPUT += ../../../userspace/units/ecc/nvgpu-ecc.h
+INPUT += ../../../userspace/units/ecc/nvgpu-pmu.h

userspace/units/acr/nvgpu-acr.c

@@ -1100,7 +1100,7 @@ int test_acr_init(struct unit_module *m,
 	return UNIT_SUCCESS;
 }
 
-int free_falcon_test_env(struct unit_module *m, struct gk20a *g,
+static int free_falcon_test_env(struct unit_module *m, struct gk20a *g,
 					void *__args)
 {
 	if (pmu_flcn == NULL) {

userspace/units/acr/nvgpu-acr.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -32,18 +32,23 @@ struct unit_module;
 /**
  * Test specification for: test_acr_init
  *
- * Description: The test_acr_init shall test the initialisation of
+ * Description: The test_acr_init shall test the initialization of
  * the ACR unit
  *
- * Test Type: Feature
+ * Test Type: Feature, Error guessing
+ *
+ * Targets: nvgpu_acr_init
  *
  * Input: None
  *
  * Steps:
  * - Initialize the falcon test environment
+ * - Initialize the ECC support
  * - Initialize the PMU
  * - Inject memory allocation fault to test the fail scenario 1
  * - Give incorrect chip version to test the fail scenario 2
+ * - Give correct chip id and set the register to enable debug mode
+ *   to have branch coverage
  * - Give correct chip id and test the pass scenario
  * - Uninitialize the PMU support
  *
@@ -58,18 +63,19 @@ int test_acr_init(struct unit_module *m, struct gk20a *g, void *args);
  * Description: The test_acr_prepare_ucode_blob shall test the blob creation of
  * the ACR unit
  *
- * Test Type: Feature
+ * Test Type: Feature, Error guessing
+ *
+ * Targets: g->acr->prepare_ucode_blob
  *
  * Input: None
  * Steps:
- * - Initialize the falcon test environment
- * - Set the flag NVGPU_SEC_SECUREGPCCS
- * - Allocate memory for GR
- * - Initialize the PMU
- * - Initialize the ACR unit
- * - Initialize the MMU
- * - Prepare SW and HW for GR
- * - Prepare ucode BLOB
+ * - Initialize the test env and register space needed for the test
+ * - Prepare HW and SW setup needed for the test
+ * - Inject memmory allocation failure to test fai scneario for
+ *   g->acr->prepare_ucode_blob(g)
+ * - Give incorrect chip version number to test second fail scenario
+ * - NVGPU_SEC_SECUREGPCCS flag is set to false to get the branch coverage
+ * - NVGPU_SEC_SECUREGPCCS flag is set to true to test the pass scenario
  *
  * Output: Returns PASS if the steps above were executed successfully. FAIL
  * otherwise.
@@ -83,19 +89,19 @@ int test_acr_prepare_ucode_blob(struct unit_module *m, struct gk20a *g,
  * Description: The test_acr_is_lsf_lazy_bootstrap shall test the
  * lazy bootstrap of the ACR unit
  *
- * Test Type: Feature
+ * Test Type: Feature, Error guessing
+ *
+ * Targets: nvgpu_acr_is_lsf_lazy_bootstrap
  *
  * Input: None
  *
  * Steps:
- * - Initialize the falcon test environment
- * - Set the flag NVGPU_SEC_SECUREGPCCS
- * - Allocate memory for GR
- * - Initialize the PMU
- * - Initialize the ACR unit
- * - Initialize the MMU
- * - Prepare SW and HW for GR
- * - lsf lazy bootstrap
+ * - Initialize the test env and register space needed for the test
+ * - Prepare HW and SW setup needed for the test
+ * - Pass scenario: lsf lazy bootstrap the ACR for following falcon ids:
+ *   FALCON_ID_FECS, FALCON_ID_PMU and FALCON_ID_GPCCS
+ * - Pass invalid falcon id to fail the function
+ * - Pass acr as NULL to fail nvgpu_acr_is_lsf_lazy_bootstrap()
  *
  * Output: Returns PASS if the steps above were executed successfully. FAIL
  * otherwise.
@@ -111,21 +117,23 @@ int test_acr_is_lsf_lazy_bootstrap(struct unit_module *m, struct gk20a *g,
  * 1. Blob construct of LS ucode in non-wpr memory
  * 2. ACR HS ucode load & bootstrap
  *
- * Test Type: Feature
+ * Test Type: Feature, Error guessing
+ *
+ * Targets: g->ops.acr.acr_construct_execute
  *
  * Input: None
  *
  * Steps:
- * - Initialize the falcon test environment
- * - Set the flag NVGPU_SEC_SECUREGPCCS
- * - Allocate memory for GR
- * - Initialize the PMU
- * - Initialize the ACR unit
- * - Initialize the MMU
- * - Prepare SW and HW for GR
+ * - Initialize the test env and register space needed for the test
+ * - Prepare HW and SW setup needed for the test
  * - Set the falcon_falcon_cpuctl_halt_intr_m bit for the
  *   register falcon_falcon_cpuctl_r
- * - Call nvgpu_acr_construct_execute() via ACR sw ops.
+ * - Inject memory allocation failure in g->acr->prepare_ucode_blob so that
+ *   acr_construct_execute() fails
+ * - Cover fail scenario when "is_falcon_supported"
+ *    is set to false. This fails nvgpu_acr_bootstrap_hs_acr()
+ * - Set is_falcon_supported to true to test the pass scenario
+ * - Pass g->acr as NULL to create fail scenario.
  *
  * Output: Returns PASS if the steps above were executed successfully. FAIL
  * otherwise.
@@ -139,24 +147,33 @@ int test_acr_construct_execute(struct unit_module *m,
  * Description: The test_acr_bootstrap_hs_acr shall test the ACR HS ucode load
  * & bootstrap functionality of the ACR unit
  *
- * Test Type: Feature
+ * Test Type: Feature, Error guessing
+ *
+ * Targets: nvgpu_acr_bootstrap_hs_acr
  *
  * Input: None
  *
  * Steps:
- * - Initialize the falcon test environment
- * - Set the flag NVGPU_SEC_SECUREGPCCS
- * - Allocate memory for GR
- * - Initialize the PMU
- * - Initialize the ACR unit
- * - Initialize the MMU
- * - Prepare SW and HW for GR
+ * - Initialize the test env and register space needed for the test
+ * - Prepare HW and SW setup needed for the test
+ * - Call prepare_ucode_blob without setting halt bit so that
+ *     timeout error occurs in acr bootstrap
  * - Set the falcon_falcon_cpuctl_halt_intr_m bit for the
- *   register falcon_falcon_cpuctl_r
+ *    register falcon_falcon_cpuctl_r
  * - Prepare the ucode blob
+ * - Set  mailbox_error = true to create read failure for mailbox 0 register
+ * - Inject memory allocation failure to fail nvgpu_acr_bootstrap_hs_acr()
  * - Call nvgpu_acr_bootstrap_hs_acr() twice to cover recovery branch.
- * - Create fail/negative scenario of nvgpu_acr_bootstrap_hs_acr()
-     by passing g->acr = NULL. nvgpu_acr_bootstrap_hs_acr() should fail.
+ * - Cover branch for fail scenario when "is_falcon_supported" is set to false
+ * - Cover branch by setting g->acr->acr.acr_engine_bus_err_status = NULL
+ * - Cover branch when "acr_engine_bus_err_status" ops fails
+ * - Cover all scenarios to test gv11b_pmu_bar0_error_status() by wriring
+ *    different values to pwr_pmu_bar0_error_status_r() register
+ * - Set g->acr->acr.acr_validate_mem_integrity = NULL to cover branch
+ * - Set g->acr->acr.report_acr_engine_bus_err_status = NULL to cover branch
+ * - Set ->ops.pmu.is_debug_mode_enabled = true to get branch coverage
+ * - Cover branch by setting p->is_silicon = true
+ * - Pass g->acr = NULL to fail nvgpu_acr_bootstrap_hs_acr()
  *
  * Output: Returns PASS if the steps above were executed successfully. FAIL
  * otherwise.
@@ -164,22 +181,3 @@ int test_acr_construct_execute(struct unit_module *m,
 
 int test_acr_bootstrap_hs_acr(struct unit_module *m,
 					struct gk20a *g, void *args);
-
-/**
- * Test specification for: free_falcon_test_env
- *
- * Description: The free_falcon_test_env shall free up the falcon
- * test environment.
- *
- * Test Type: Feature
- *
- * Input: None
- *
- * Steps:
- * - Free up the space allocated for utf_flcn (both imem and dmem)
- * - Free up the register space
- *
- * Output: Returns PASS if the steps above were executed successfully.
- *
- */
-int free_falcon_test_env(struct unit_module *m, struct gk20a *g, void *__args);

userspace/units/pmu/nvgpu-pmu.c

@@ -41,6 +41,7 @@
 #include "../falcon/falcon_utf.h"
 #include "../gr/nvgpu-gr-gv11b.h"
 #include "../mock-iospace/include/gv11b_mock_regs.h"
+#include "nvgpu-pmu.h"
 
 #define NV_PMC_BOOT_0_ARCHITECTURE_GV110        (0x00000015 << \
 						NVGPU_GPU_ARCHITECTURE_SHIFT)
@@ -304,7 +305,7 @@ static int init_pmu_falcon_test_env(struct unit_module *m, struct gk20a *g)
 	return 0;
 }
 
-static int test_pmu_early_init(struct unit_module *m,
+int test_pmu_early_init(struct unit_module *m,
 				struct gk20a *g, void *args)
 {
 	int err;
@@ -452,7 +453,7 @@ static int test_pmu_early_init(struct unit_module *m,
 	return UNIT_SUCCESS;
 }
 
-static int test_pmu_remove_support(struct unit_module *m,
+int test_pmu_remove_support(struct unit_module *m,
 				struct gk20a *g, void *args)
 {
 	int err;
@@ -471,7 +472,7 @@ static int test_pmu_remove_support(struct unit_module *m,
 	return UNIT_SUCCESS;
 }
 
-static int test_pmu_reset(struct unit_module *m,
+int test_pmu_reset(struct unit_module *m,
 				struct gk20a *g, void *args)
 {
 	int err;
@@ -577,7 +578,7 @@ static int test_pmu_reset(struct unit_module *m,
 	return UNIT_SUCCESS;
 }
 
-static int test_pmu_isr(struct unit_module *m,
+int test_pmu_isr(struct unit_module *m,
 				struct gk20a *g, void *args)
 {	int err;
 	u32 ecc_value, ecc_intr_value;
@@ -748,7 +749,7 @@ static int test_pmu_isr(struct unit_module *m,
 	return UNIT_SUCCESS;
 }
 
-static int test_is_pmu_supported(struct unit_module *m,
+int test_is_pmu_supported(struct unit_module *m,
 				struct gk20a *g, void *args)
 {
 	bool status;

userspace/units/pmu/nvgpu-pmu.h

@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2020, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+struct gk20a;
+struct unit_module;
+
+/** @addtogroup SWUTS-pmu
+ *  @{
+ *
+ * Software Unit Test Specification for pmu
+ */
+
+/**
+ * Test specification for: test_pmu_early_init
+ *
+ * Description: The test_pmu_early_init shall test the
+ * initialization of the PMU unit
+ *
+ * Test Type: Feature, Error guessing
+ *
+ * Targets: nvgpu_pmu_early_init
+ *
+ * Input: None
+ *
+ * Steps:
+ * - Initialize the falcon test environment
+ * - initialize the ECC init support, MM and LTC support
+ * - Initialize the PMU
+ * - Inject memory allocation fault to test the fail scenario 1
+ * - Inject memory allocation fault to fail g->ops.pmu.ecc_init(g)
+ * - Set correct parameters to test the pass scenario
+ * - Set g->support_ls_pmu = false to test the fail scenario
+ * - Set g->ops.pmu.is_pmu_supported = false to test the fail scenario
+ * - Remove the PMU support
+ *
+ * Output: Returns PASS if the steps above were executed successfully. FAIL
+ * otherwise.
+ */
+int test_pmu_early_init(struct unit_module *m, struct gk20a *g, void *args);
+
+/**
+ * Test specification for: test_is_pmu_supported
+ *
+ * Description: The test_is_pmu_supported shall test the fail
+ * scenario of the PMU unit
+ *
+ * Test Type: Error guessing
+ *
+ * Targets: g->ops.pmu.is_pmu_supported
+ *
+ * Input: None
+ * Steps:
+ * - Initialize the falcon test environment
+ * - initialize the ECC init support
+ * - Initialize the PMU unit
+ * - Call g->ops.pmu.is_pmu_supported(g)
+ * - Status for PMU support is returned as false
+ *
+ * Output: Returns PASS if the steps above were executed successfully. FAIL
+ * otherwise.
+ */
+
+int test_is_pmu_supported(struct unit_module *m, struct gk20a *g,
+					void *__args);
+/**
+ * Test specification for: test_pmu_remove_support
+ *
+ * Description: The test_pmu_remove_support shall test the deinit of
+ * PMU unit
+ *
+ * Test Type: Feature, Error guessing
+ *
+ * Targets: nvgpu_pmu_remove_support
+ *
+ * Input: None
+ * Steps:
+ * - Initialize the PMU unit
+ * - Deinit the PMU unit
+ * - Deinitilisation of PMU happens successfully
+ *
+ * Output: Returns PASS if the steps above were executed successfully. FAIL
+ * otherwise.
+ */
+
+int test_pmu_remove_support(struct unit_module *m, struct gk20a *g,
+					void *__args);
+/**
+ * Test specification for: test_pmu_reset
+ *
+ * Description: The test_pmu_reset shall test the reset of the PMU unit
+ *
+ * Test Type: Feature, Error guessing
+ *
+ * Targets: nvgpu_pmu_reset
+ *
+ * Input: None
+ *
+ * Steps:
+ * - Initialize the falcon environment
+ * - initialize the ECC init support, MM and LTC support
+ * - Initialize the PMU
+ * - Reset the PMU to test the pass scenario
+ * - Set the falcon_falcon_idlestate_r register to 0x1
+ *   to make the falcon busy so that idle wait function fails
+ *   This case covers failig branch of the reset function
+ * - Set the falcon dmactl register to 0x2 (IMEM_SCRUBBING_PENDING)
+ *    to test the fail scenario
+ * - Set pwr_falcon_engine_r true to fail gv11b_pmu_is_engine_in_reset()
+ * - Set g->is_fusa_sku = true to get branch coverage
+ * - g->ops.pmu.pmu_enable_irq to NULL to achieve branch coverage
+ *
+ * Output: Returns PASS if the steps above were executed successfully. FAIL
+ * otherwise.
+ */
+
+int test_pmu_reset(struct unit_module *m, struct gk20a *g,
+					void *__args);
+/**
+ * Test specification for: test_pmu_isr
+ *
+ * Description: The test_pmu_isr shall test the two main tasks of
+ * the ISR routine of PMU.
+ *
+ * Test Type: Feature, Error guessing
+ *
+ * Targets: g->ops.pmu.pmu_isr
+ *
+ * Input: None
+ *
+ * Steps:
+ * - Initialize the falcon environment
+ * - Initialize the various registers needed for the test
+ * - initialize the ECC init support
+ * - Initialize the PMU
+ * - Set the IRQ stat and mask registers
+ * - Call the g->ops.pmu.pmu_isr(g) to test the pass scenario
+ * - Test the fail scenario by setting pwr_pmu_falcon_ecc_status_r() and
+ *   pwr_pmu_ecc_intr_status_r() register to create interrupts with
+ *   different values
+ * - Set pwr_falcon_irqstat_r(), pwr_falcon_irqmask_r() and
+ *   pwr_falcon_irqdest_r() register to 0x1 to test branches in the function
+ *   gv11b_pmu_handle_ext_irq()
+ * - Set pwr_falcon_irqmask_r() and pwr_falcon_irqdest_r() to
+ *   pwr_falcon_irqstat_ext_ecc_parity_true_f() i.e.0x400
+ *   Set pwr_falcon_irqstat_r() to 0x0 to cover branch for intr = 0 in
+ *   gk20a_pmu_isr()
+ * - Set g->ops.pmu.handle_ext_irq = NULL to achieve branch coverage
+ *
+ * Output: Returns PASS if the steps above were executed successfully. FAIL
+ * otherwise.
+ */
+
+int test_pmu_isr(struct unit_module *m, struct gk20a *g, void *args);