mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-25 02:52:51 +03:00
gpu: nvgpu: support SMPC global mode
Add tu104 specific HAL tu104_gr_falcon_ctrl_ctxsw() that processes below CTXSW methods to start/stop SMPC global mode : NVGPU_GR_FALCON_METHOD_START_SMPC_GLOBAL_MODE NVGPU_GR_FALCON_METHOD_STOP_SMPC_GLOBAL_MODE Add new tu104 specific HAL tu104_gr_update_smpc_global_mode() to trigger SMPC global mode start/stop using gops.gr.falcon.ctrl_ctxsw(). Update nvgpu_dbg_gpu_ioctl_smpc_ctxsw_mode() to enable/disable SMPC global mode if channel is not bound to debug session. Bug 2510974 Bug 2257799 Jira NVGPU-5360 Change-Id: I1f9d8f2a2d30a4738f291db3fc72c400d24f4048 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2368696 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
7283867a97
commit
39a3854584
@@ -950,6 +950,7 @@ static int nvgpu_dbg_gpu_ioctl_smpc_ctxsw_mode(struct dbg_session_gk20a *dbg_s,
|
||||
struct gk20a *g = dbg_s->g;
|
||||
struct nvgpu_channel *ch_gk20a;
|
||||
struct nvgpu_tsg *tsg;
|
||||
bool global_mode = false;
|
||||
|
||||
nvgpu_log_fn(g, "%s smpc ctxsw mode = %d",
|
||||
g->name, args->mode);
|
||||
@@ -965,24 +966,36 @@ static int nvgpu_dbg_gpu_ioctl_smpc_ctxsw_mode(struct dbg_session_gk20a *dbg_s,
|
||||
|
||||
ch_gk20a = nvgpu_dbg_gpu_get_session_channel(dbg_s);
|
||||
if (!ch_gk20a) {
|
||||
nvgpu_err(g,
|
||||
"no bound channel for smpc ctxsw mode update");
|
||||
err = -EINVAL;
|
||||
goto clean_up;
|
||||
global_mode = true;
|
||||
}
|
||||
|
||||
tsg = nvgpu_tsg_from_ch(ch_gk20a);
|
||||
if (tsg == NULL) {
|
||||
nvgpu_err(g, "channel not bound to TSG");
|
||||
err = -EINVAL;
|
||||
goto clean_up;
|
||||
}
|
||||
if (global_mode) {
|
||||
if (g->ops.gr.update_smpc_global_mode == NULL) {
|
||||
nvgpu_err(g, "SMPC global mode not supported");
|
||||
err = -EINVAL;
|
||||
goto clean_up;
|
||||
}
|
||||
|
||||
err = g->ops.gr.update_smpc_ctxsw_mode(g, tsg,
|
||||
err = g->ops.gr.update_smpc_global_mode(g,
|
||||
args->mode == NVGPU_DBG_GPU_SMPC_CTXSW_MODE_CTXSW);
|
||||
if (err) {
|
||||
nvgpu_err(g,
|
||||
"error (%d) during smpc ctxsw mode update", err);
|
||||
if (err) {
|
||||
nvgpu_err(g,
|
||||
"error (%d) during smpc global mode update", err);
|
||||
}
|
||||
} else {
|
||||
tsg = nvgpu_tsg_from_ch(ch_gk20a);
|
||||
if (tsg == NULL) {
|
||||
nvgpu_err(g, "channel not bound to TSG");
|
||||
err = -EINVAL;
|
||||
goto clean_up;
|
||||
}
|
||||
|
||||
err = g->ops.gr.update_smpc_ctxsw_mode(g, tsg,
|
||||
args->mode == NVGPU_DBG_GPU_SMPC_CTXSW_MODE_CTXSW);
|
||||
if (err) {
|
||||
nvgpu_err(g,
|
||||
"error (%d) during smpc ctxsw mode update", err);
|
||||
}
|
||||
}
|
||||
|
||||
clean_up:
|
||||
|
||||
Reference in New Issue
Block a user