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gpu: nvgpu: Add fifo conf support for gp10x

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Added fifo configuration support for gp104 and
gp106. These GPU chips have more number of
channel fifo and runlist than gp10b.
Added get_num_fifos and
eng_runlist_base_size function pointer
to find out the actual value from HW headers.

JIRA DNVGPU-25

Change-Id: I2322a6354eaa2af2b2605f3e9eedebf9827c7dda
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1164653
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Lakshmanan M
2016-06-15 10:23:43 +05:30
committed by Deepak Nibade
parent a445c27d5b
commit 39f3a8b89f
4 changed files with 52 additions and 3 deletions
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3
drivers/gpu/nvgpu/Makefile
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@@ -25,7 +25,8 @@ nvgpu-y += \
$(nvgpu-t18x)/gp106/gr_gp106.o \
$(nvgpu-t18x)/gp106/gr_ctx_gp106.o \
$(nvgpu-t18x)/gp106/acr_gp106.o \
$(nvgpu-t18x)/gp106/sec2_gp106.o
$(nvgpu-t18x)/gp106/sec2_gp106.o \
$(nvgpu-t18x)/gp106/fifo_gp106.o
nvgpu-$(CONFIG_TEGRA_GK20A) += $(nvgpu-t18x)/gp10b/platform_gp10b_tegra.o

30
drivers/gpu/nvgpu/gp106/fifo_gp106.c Normal file
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@@ -0,0 +1,30 @@
/*
* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#include "gk20a/gk20a.h"
#include "gp10b/fifo_gp10b.h"
#include "fifo_gp106.h"
#include "hw_ccsr_gp106.h"
#include "hw_fifo_gp106.h"
static u32 gp106_fifo_get_num_fifos(struct gk20a *g)
{
return ccsr_channel__size_1_v();
}
void gp106_init_fifo(struct gpu_ops *gops)
{
gp10b_init_fifo(gops);
gops->fifo.get_num_fifos = gp106_fifo_get_num_fifos;
gops->fifo.eng_runlist_base_size = fifo_eng_runlist_base__size_1_v;
}

18
drivers/gpu/nvgpu/gp106/fifo_gp106.h Normal file
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@@ -0,0 +1,18 @@
/*
* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#ifndef NVGPU_FIFO_GP106_H
#define NVGPU_FIFO_GP106_H
struct gpu_ops;
void gp106_init_fifo(struct gpu_ops *gops);
#endif

4
drivers/gpu/nvgpu/gp106/hal_gp106.c
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@@ -26,7 +26,7 @@
#include "gp10b/mm_gp10b.h"
#include "gp10b/ce_gp10b.h"
#include "gp10b/fb_gp10b.h"
#include "gp10b/fifo_gp10b.h"
#include "gp106/fifo_gp106.h"
#include "gp10b/gp10b_gating_reglist.h"
#include "gp10b/regops_gp10b.h"
#include "gp10b/cde_gp10b.h"
@@ -193,7 +193,7 @@ int gp106_init_hal(struct gk20a *g)
gp106_init_gr(gops);
gp10b_init_ltc(gops);
gp10b_init_fb(gops);
gp10b_init_fifo(gops);
gp106_init_fifo(gops);
gp10b_init_ce(gops);
gp106_init_gr_ctx(gops);
gp106_init_mm(gops);