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gpu: nvgpu: update pmu_early_init
Move the setting of power features related enable flags to separate static function. Invoke this function when PMU is not supported. JIRA NVGPU-9283 Change-Id: I429504c09d40c2cb115fce7550555f06b1e384ed Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2817658 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Ramalingam C <ramalingamc@nvidia.com> Reviewed-by: Ankur Kishore <ankkishore@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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@@ -222,10 +222,12 @@ int nvgpu_engine_disable_activity(struct gk20a *g,
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}
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}
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#ifdef CONFIG_NVGPU_LS_PMU
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#ifdef CONFIG_NVGPU_LS_PMU
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if (g->ops.pmu.is_pmu_supported != NULL) {
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if (g->ops.pmu.is_pmu_supported(g)) {
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if (g->ops.pmu.is_pmu_supported(g)) {
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mutex_ret = nvgpu_pmu_lock_acquire(g, g->pmu,
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mutex_ret = nvgpu_pmu_lock_acquire(g, g->pmu,
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PMU_MUTEX_ID_FIFO, &token);
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PMU_MUTEX_ID_FIFO, &token);
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}
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}
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}
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#endif
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#endif
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nvgpu_runlist_set_state(g, BIT32(dev->runlist_id),
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nvgpu_runlist_set_state(g, BIT32(dev->runlist_id),
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@@ -162,6 +162,24 @@ void nvgpu_pmu_remove_support(struct gk20a *g, struct nvgpu_pmu *pmu)
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}
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}
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}
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}
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static void nvgpu_pmu_disable_features(struct gk20a *g)
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{
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g->support_ls_pmu = false;
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/* Disable LS PMU global checkers */
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#ifdef CONFIG_NVGPU_NON_FUSA
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g->can_elpg = false;
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g->elpg_enabled = false;
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g->aelpg_enabled = false;
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g->elpg_ms_enabled = false;
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#endif
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nvgpu_set_enabled(g, NVGPU_PMU_PERFMON, false);
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nvgpu_set_enabled(g, NVGPU_ELPG_MS_ENABLED, false);
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#ifdef CONFIG_NVGPU_DGPU
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nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false);
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#endif
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}
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/* PMU unit init */
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/* PMU unit init */
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int nvgpu_pmu_early_init(struct gk20a *g)
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int nvgpu_pmu_early_init(struct gk20a *g)
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{
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{
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@@ -170,6 +188,11 @@ int nvgpu_pmu_early_init(struct gk20a *g)
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nvgpu_log_fn(g, " ");
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nvgpu_log_fn(g, " ");
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if (g->ops.pmu.is_pmu_supported == NULL) {
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nvgpu_pmu_disable_features(g);
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goto exit;
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}
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if (g->pmu != NULL) {
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if (g->pmu != NULL) {
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/* skip alloc/reinit for unrailgate sequence */
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/* skip alloc/reinit for unrailgate sequence */
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nvgpu_pmu_dbg(g, "skip pmu init for unrailgate sequence");
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nvgpu_pmu_dbg(g, "skip pmu init for unrailgate sequence");
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@@ -208,20 +231,7 @@ int nvgpu_pmu_early_init(struct gk20a *g)
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}
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}
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if (!g->ops.pmu.is_pmu_supported(g)) {
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if (!g->ops.pmu.is_pmu_supported(g)) {
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g->support_ls_pmu = false;
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nvgpu_pmu_disable_features(g);
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/* Disable LS PMU global checkers */
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#ifdef CONFIG_NVGPU_NON_FUSA
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g->can_elpg = false;
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g->elpg_enabled = false;
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g->aelpg_enabled = false;
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g->elpg_ms_enabled = false;
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#endif
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nvgpu_set_enabled(g, NVGPU_PMU_PERFMON, false);
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nvgpu_set_enabled(g, NVGPU_ELPG_MS_ENABLED, false);
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#ifdef CONFIG_NVGPU_DGPU
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nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false);
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#endif
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goto exit;
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goto exit;
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}
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}
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