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gpu: nvgpu: fix MISRA 10.5 issue in timeout code
This change switches nvgpu_timeout_peek_expired() to return a bool instead of an int to remove advisory rule MISRA 10.5 violations. MISRA 10.5 states that the value of an expression should not be cast to an inappropriate essential type. JIRA NVGPU-3798 Change-Id: I5cf9badaf07493e11a639e47ae4cf221700134ff Signed-off-by: Scott Long <scottl@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2155617 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -100,7 +100,7 @@ int nvgpu_falcon_wait_for_halt(struct nvgpu_falcon *flcn, unsigned int timeout)
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nvgpu_udelay(10);
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} while (nvgpu_timeout_expired(&to) == 0);
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if (nvgpu_timeout_peek_expired(&to) != 0) {
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if (nvgpu_timeout_peek_expired(&to)) {
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status = -ETIMEDOUT;
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}
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@@ -169,7 +169,7 @@ int nvgpu_falcon_mem_scrub_wait(struct nvgpu_falcon *flcn)
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nvgpu_udelay(MEM_SCRUBBING_TIMEOUT_DEFAULT);
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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status = -ETIMEDOUT;
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}
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@@ -616,7 +616,7 @@ int nvgpu_falcon_clear_halt_intr_status(struct nvgpu_falcon *flcn,
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nvgpu_udelay(1);
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} while (nvgpu_timeout_expired(&to) == 0);
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if (nvgpu_timeout_peek_expired(&to) != 0) {
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if (nvgpu_timeout_peek_expired(&to)) {
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status = -ETIMEDOUT;
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}
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@@ -982,7 +982,7 @@ static void nvgpu_channel_wdt_handler(struct nvgpu_channel *ch)
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if (new_gp_get != gp_get || new_pb_get != pb_get) {
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/* Channel has advanced, timer keeps going but resets */
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nvgpu_channel_wdt_rewind(ch);
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} else if (nvgpu_timeout_peek_expired(&ch->wdt.timer) == 0) {
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} else if (!nvgpu_timeout_peek_expired(&ch->wdt.timer)) {
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/* Seems stuck but waiting to time out */
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} else {
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nvgpu_err(g, "Job on channel %d timed out",
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@@ -1083,7 +1083,7 @@ static void nvgpu_channel_worker_poll_wakeup_post_process_item(
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nvgpu_channel_worker_from_worker(worker);
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int ret;
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if (nvgpu_timeout_peek_expired(&ch_worker->timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&ch_worker->timeout)) {
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nvgpu_channel_poll_wdt(g);
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ret = nvgpu_timeout_init(g, &ch_worker->timeout,
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ch_worker->watchdog_interval,
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@@ -114,7 +114,7 @@ int nvgpu_nvlink_minion_load(struct gk20a *g)
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/* Service interrupts */
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g->ops.nvlink.minion.falcon_isr(g);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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err = -ETIMEDOUT;
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goto exit;
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}
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@@ -198,7 +198,7 @@ int gv100_bios_devinit(struct gk20a *g)
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nvgpu_udelay(PMU_BOOT_TIMEOUT_DEFAULT);
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} while (!devinit_completed && (nvgpu_timeout_expired(&timeout) == 0));
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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err = -ETIMEDOUT;
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goto out;
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}
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@@ -1,7 +1,7 @@
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/*
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* GM20B MMU
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*
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* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -65,7 +65,7 @@ int gm20b_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst)
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nvgpu_udelay(5);
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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err = -EINVAL;
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -62,7 +62,7 @@ int gp10b_bus_bar2_bind(struct gk20a *g, struct nvgpu_mem *bar2_inst)
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nvgpu_udelay(5);
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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err = -EINVAL;
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}
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@@ -67,7 +67,7 @@ int bus_tu104_bar2_bind(struct gk20a *g, struct nvgpu_mem *bar2_inst)
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nvgpu_udelay(5);
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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err = -EINVAL;
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}
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@@ -193,7 +193,7 @@ int gm20b_cbc_ctrl(struct gk20a *g, enum nvgpu_cbc_op op,
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nvgpu_udelay(5);
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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nvgpu_err(g, "comp tag clear timeout");
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err = -EBUSY;
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goto out;
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@@ -193,7 +193,7 @@ int gp10b_cbc_ctrl(struct gk20a *g, enum nvgpu_cbc_op op,
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nvgpu_udelay(5);
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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nvgpu_err(g, "comp tag clear timeout");
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err = -EBUSY;
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goto out;
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@@ -200,7 +200,7 @@ int tu104_cbc_ctrl(struct gk20a *g, enum nvgpu_cbc_op op,
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nvgpu_udelay(5);
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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nvgpu_err(g, "comp tag clear timeout");
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err = -EBUSY;
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goto out;
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@@ -147,7 +147,7 @@ int gm20b_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb)
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} while (nvgpu_timeout_expired_msg(&timeout,
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"wait mmu fifo space") == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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err = -ETIMEDOUT;
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goto out;
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}
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@@ -85,7 +85,7 @@ int gk20a_mm_fb_flush(struct gk20a *g)
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}
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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if (g->ops.fb.dump_vpr_info != NULL) {
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g->ops.fb.dump_vpr_info(g);
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}
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@@ -143,7 +143,7 @@ static void gk20a_mm_l2_invalidate_locked(struct gk20a *g)
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}
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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nvgpu_warn(g, "l2_system_invalidate too many retries");
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}
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@@ -252,7 +252,7 @@ int gv100_nvlink_setup_pll(struct gk20a *g, unsigned long link_mask)
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} while ((nvgpu_timeout_expired_msg(&timeout, "timeout on pll on") == 0)
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&& (links_off != 0U));
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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return -ETIMEDOUT;
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}
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@@ -318,7 +318,7 @@ static int gv100_nvlink_rxcal_en(struct gk20a *g, unsigned long mask)
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} while (nvgpu_timeout_expired_msg(&timeout,
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"timeout on rxcal") == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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return -ETIMEDOUT;
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}
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}
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@@ -513,7 +513,7 @@ static int gv100_nvlink_link_sublink_check_change(struct gk20a *g, u32 link_id)
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} while (nvgpu_timeout_expired_msg(&timeout,
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"timeout on sublink rdy") == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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return -ETIMEDOUT;
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}
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return err;
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@@ -67,7 +67,7 @@ int tu104_nvlink_setup_pll(struct gk20a *g, unsigned long link_mask)
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} while (nvgpu_timeout_expired_msg(&timeout,
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"Timed out setting pll on link %u",
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link_id) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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return -ETIMEDOUT;
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}
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}
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@@ -140,7 +140,7 @@ static int gv100_nvlink_minion_command_complete(struct gk20a *g, u32 link_id)
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} while (nvgpu_timeout_expired_msg(&timeout,
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"minion cmd timeout") == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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return -ETIMEDOUT;
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}
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@@ -253,7 +253,7 @@ static int do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
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}
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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err_status = -ETIMEDOUT;
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goto done;
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}
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@@ -331,7 +331,7 @@ static int do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
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}
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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err_status = -ETIMEDOUT;
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goto done;
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}
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@@ -370,7 +370,7 @@ static int do_xve_set_speed_gp106(struct gk20a *g, u32 next_link_speed)
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}
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} while (nvgpu_timeout_expired(&timeout) == 0);
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if (nvgpu_timeout_peek_expired(&timeout) != 0) {
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if (nvgpu_timeout_peek_expired(&timeout)) {
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err_status = -ETIMEDOUT;
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xv_sc_dbg(g, EXEC_CHANGE, " timeout; pl_link_config = 0x%x",
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pl_link_config);
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@@ -83,7 +83,7 @@ struct nvgpu_timeout {
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int nvgpu_timeout_init(struct gk20a *g, struct nvgpu_timeout *timeout,
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u32 duration, unsigned long flags);
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int nvgpu_timeout_peek_expired(struct nvgpu_timeout *timeout);
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bool nvgpu_timeout_peek_expired(struct nvgpu_timeout *timeout);
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#define nvgpu_timeout_expired(__timeout) \
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nvgpu_timeout_expired_msg_impl(__timeout, NVGPU_GET_IP, "")
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@@ -161,16 +161,16 @@ int nvgpu_timeout_expired_msg_impl(struct nvgpu_timeout *timeout,
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*
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* @timeout - The timeout to check.
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*
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* Returns non-zero if the timeout is expired, zero otherwise. In the case of
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* Returns true if the timeout is expired, false otherwise. In the case of
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* retry timers this will not increment the underlying retry count. Also if the
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* timer has expired no messages will be printed.
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*
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* This function honors the pre-Si check as well.
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*/
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int nvgpu_timeout_peek_expired(struct nvgpu_timeout *timeout)
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bool nvgpu_timeout_peek_expired(struct nvgpu_timeout *timeout)
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{
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if (nvgpu_timeout_is_pre_silicon(timeout))
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return 0;
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return false;
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if (timeout->flags & NVGPU_TIMER_RETRY_TIMER)
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return timeout->retries.attempted >=
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@@ -181,13 +181,13 @@ int nvgpu_timeout_expired_msg_impl(struct nvgpu_timeout *timeout,
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return ret;
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}
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int nvgpu_timeout_peek_expired(struct nvgpu_timeout *timeout)
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bool nvgpu_timeout_peek_expired(struct nvgpu_timeout *timeout)
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{
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if ((timeout->flags & NVGPU_TIMER_RETRY_TIMER) != 0U) {
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return (int) (timeout->retries.attempted >=
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timeout->retries.max_attempts);
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return (timeout->retries.attempted >=
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timeout->retries.max_attempts);
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} else {
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return (int) (time_after(get_time_ns(), timeout->time));
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return time_after(get_time_ns(), timeout->time);
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}
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}
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