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gpu: nvgpu: verify channel status while closing per-platform
We right now call gk20a_fifo_tsg_unbind_channel_verify_status() to verify channel status while unbinding a channel from TSG while closing Add support to do this verification per-platform and keep this disabled for vgpu platforms Bug 200327095 Change-Id: I19fab41c74d10d528d22bd9b3982a4ed73c3b4ca Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1572368 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -1908,7 +1908,7 @@ int gk20a_fifo_force_reset_ch(struct channel_gk20a *ch,
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return 0;
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}
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static int gk20a_fifo_tsg_unbind_channel_verify_status(struct channel_gk20a *ch)
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int gk20a_fifo_tsg_unbind_channel_verify_status(struct channel_gk20a *ch)
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{
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struct gk20a *g = ch->g;
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@@ -1939,9 +1939,11 @@ int gk20a_fifo_tsg_unbind_channel(struct channel_gk20a *ch)
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if (err)
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goto fail_enable_tsg;
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err = gk20a_fifo_tsg_unbind_channel_verify_status(ch);
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if (err)
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goto fail_enable_tsg;
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if (g->ops.fifo.tsg_verify_channel_status) {
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err = g->ops.fifo.tsg_verify_channel_status(ch);
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if (err)
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goto fail_enable_tsg;
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}
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/* Channel should be seen as TSG channel while updating runlist */
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err = channel_gk20a_update_runlist(ch, false);
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@@ -373,6 +373,7 @@ void gk20a_fifo_disable_channel(struct channel_gk20a *ch);
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bool gk20a_fifo_channel_status_is_next(struct gk20a *g, u32 chid);
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bool gk20a_fifo_channel_status_is_ctx_reload(struct gk20a *g, u32 chid);
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int gk20a_fifo_tsg_unbind_channel_verify_status(struct channel_gk20a *ch);
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struct channel_gk20a *gk20a_refch_from_inst_ptr(struct gk20a *g, u64 inst_ptr);
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void gk20a_fifo_channel_unbind(struct channel_gk20a *ch_gk20a);
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@@ -491,6 +491,7 @@ struct gpu_ops {
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int (*preempt_tsg)(struct gk20a *g, u32 tsgid);
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int (*enable_tsg)(struct tsg_gk20a *tsg);
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int (*disable_tsg)(struct tsg_gk20a *tsg);
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int (*tsg_verify_channel_status)(struct channel_gk20a *ch);
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void (*tsg_verify_status_ctx_reload)(struct channel_gk20a *ch);
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void (*tsg_verify_status_faulted)(struct channel_gk20a *ch);
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int (*reschedule_runlist)(struct gk20a *g, u32 runlist_id);
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@@ -379,6 +379,7 @@ static const struct gpu_ops gm20b_ops = {
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.preempt_tsg = gk20a_fifo_preempt_tsg,
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.enable_tsg = gk20a_enable_tsg,
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.disable_tsg = gk20a_disable_tsg,
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.tsg_verify_channel_status = gk20a_fifo_tsg_unbind_channel_verify_status,
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.tsg_verify_status_ctx_reload = gm20b_fifo_tsg_verify_status_ctx_reload,
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.update_runlist = gk20a_fifo_update_runlist,
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.trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault,
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@@ -438,6 +438,7 @@ static const struct gpu_ops gp106_ops = {
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.preempt_tsg = gk20a_fifo_preempt_tsg,
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.enable_tsg = gk20a_enable_tsg,
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.disable_tsg = gk20a_disable_tsg,
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.tsg_verify_channel_status = gk20a_fifo_tsg_unbind_channel_verify_status,
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.tsg_verify_status_ctx_reload = gm20b_fifo_tsg_verify_status_ctx_reload,
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.update_runlist = gk20a_fifo_update_runlist,
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.trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault,
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@@ -400,6 +400,7 @@ static const struct gpu_ops gp10b_ops = {
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.preempt_tsg = gk20a_fifo_preempt_tsg,
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.enable_tsg = gk20a_enable_tsg,
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.disable_tsg = gk20a_disable_tsg,
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.tsg_verify_channel_status = gk20a_fifo_tsg_unbind_channel_verify_status,
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.tsg_verify_status_ctx_reload = gm20b_fifo_tsg_verify_status_ctx_reload,
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.reschedule_runlist = gk20a_fifo_reschedule_runlist,
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.update_runlist = gk20a_fifo_update_runlist,
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