gpu: nvgpu: unit: ltc: add test for flush_ltc HAL

Add test for gm20b_flush_ltc HAL.

JIRA NVGPU-2219

Change-Id: Idf1e658ac06207b74dbec0ebd2234adc458282be
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2255350
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-12-04 13:01:10 -05:00
committed by Alex Waterman
parent 882cf68562
commit 3d202fcceb
4 changed files with 80 additions and 0 deletions

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@@ -486,6 +486,7 @@ nvgpu_rwsem_up_read
nvgpu_rwsem_up_write
nvgpu_timeout_init
nvgpu_timeout_peek_expired
nvgpu_timers_get_fault_injection
nvgpu_tsg_abort
nvgpu_tsg_bind_channel
nvgpu_tsg_check_and_get_from_id

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@@ -1127,6 +1127,12 @@
"unit": "nvgpu-ltc",
"test_level": 0
},
{
"test": "test_flush_ltc",
"case": "ltc_flush",
"unit": "nvgpu-ltc",
"test_level": 0
},
{
"test": "test_netlist_init_support",
"case": "netlist_init_support",

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@@ -623,6 +623,49 @@ int test_ltc_set_enabled(struct unit_module *m, struct gk20a *g, void *args)
return UNIT_SUCCESS;
}
int test_flush_ltc(struct unit_module *m, struct gk20a *g, void *args)
{
int ret = UNIT_SUCCESS;
int i;
u32 stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE);
struct nvgpu_posix_fault_inj *timer_fi =
nvgpu_timers_get_fault_injection();
/* make it appear the clean & invalidate completed */
for (i = 0; i < NUM_LTC; i++) {
nvgpu_posix_io_writel_reg_space(g,
ltc_ltc0_ltss_tstg_cmgmt1_r() + (i * stride),
0x0);
nvgpu_posix_io_writel_reg_space(g,
ltc_ltc0_ltss_tstg_cmgmt0_r() + (i * stride),
0x0);
}
g->ops.ltc.flush(g);
/*
* make it appear the clean & invalidate are pending to validate
* timeouts
*/
for (i = 0; i < NUM_LTC; i++) {
nvgpu_posix_io_writel_reg_space(g,
ltc_ltc0_ltss_tstg_cmgmt1_r() + (i * stride),
ltc_ltc0_ltss_tstg_cmgmt1_clean_pending_f());
nvgpu_posix_io_writel_reg_space(g,
ltc_ltc0_ltss_tstg_cmgmt0_r() + (i * stride),
ltc_ltc0_ltss_tstg_cmgmt0_invalidate_pending_f());
}
g->ops.ltc.flush(g);
/* enable fault injection for the timer init call for branch coverage */
nvgpu_posix_enable_fault_injection(timer_fi, true, 0);
g->ops.ltc.flush(g);
nvgpu_posix_enable_fault_injection(timer_fi, false, 0);
return ret;
}
struct unit_module_test nvgpu_ltc_tests[] = {
UNIT_TEST(ltc_init_support, test_ltc_init_support, NULL, 0),
UNIT_TEST(ltc_ecc_init_free, test_ltc_ecc_init_free, NULL, 0),
@@ -634,6 +677,7 @@ struct unit_module_test nvgpu_ltc_tests[] = {
UNIT_TEST(ltc_intr_configure, test_ltc_intr_configure, NULL, 0),
UNIT_TEST(ltc_determine_L2_size, test_determine_L2_size_bytes, NULL, 0),
UNIT_TEST(ltc_set_enabled, test_ltc_set_enabled, NULL, 0),
UNIT_TEST(ltc_flush, test_flush_ltc, NULL, 0),
UNIT_TEST(ltc_negative_tests, test_ltc_negative_tests, NULL, 0),
UNIT_TEST(ltc_remove_support, test_ltc_remove_support, NULL, 0),
};

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@@ -337,4 +337,33 @@ int test_determine_L2_size_bytes(struct unit_module *m,
*/
int test_ltc_set_enabled(struct unit_module *m, struct gk20a *g, void *args);
/**
* Test specification for: test_flush_ltc
*
* Description: Validate the ltc API to flush the cache.
*
* Test Type: Feature based
*
* Targets: gm20b_flush_ltc
*
* Input: None
*
* Steps:
* - Configure the registers to reflect the clean and invalidate has completed
* for each ltc.
* - Call the flush API.
* - Configure the registers to reflect the clean and invalidate are pending
* for each ltc.
* - Call the flush API to get branch coverage of the timeout handling.
* - Enable the timer fault injection.
* - Call the flush API to get branch coverage of the handling of the error.
*
* Output: Returns PASS if register is configured correctly. FAIL otherwise.
*/
int test_flush_ltc(struct unit_module *m, struct gk20a *g, void *args);
/**
* @}
*/
#endif /* UNIT_NVGPU_LTC_H */