gpu: nvgpu: enable Orin support in safety build

Most of the Orin chip specific code is compiled out of safety build
with CONFIG_NVGPU_NON_FUSA and CONFIG_NVGPU_HAL_NON_FUSA. Remove the
config protection from Orin/GA10B specific code. Currently all code
is enabled. Code not required in safety will be compiled out later
in separate activity.

Other noteworthy changes in this patch related to safety build:

- In ga10b_ce_request_idle(), add a log print to dump num_pce so that
  compiler does not complain about unused variable num_pce.
- In ga10b_fifo_ctxsw_timeout_isr(), protect variables active_eng_id and
  recover under CONFIG_NVGPU_KERNEL_MODE_SUBMIT to fix compilation
  errors of unused variables.
- Compile out HAL gops.pbdma.force_ce_split() from safety since this HAL
  is GA100 specific and not required for GA10B.
- Compile out gr_ga100_process_context_buffer_priv_segment() with
  CONFIG_NVGPU_DEBUGGER.
- Compile out VAB support with CONFIG_NVGPU_HAL_NON_FUSA.
- In ga10b_gr_intr_handle_sw_method(), protect left_shift_by_2 variable
  with appropriate configs to fix unused variable compilation error.
- In ga10b_intr_isr_stall_host2soc_3(), compile ELPG function calls
  with CONFIG_NVGPU_POWER_PG.
- In ga10b_pmu_handle_swgen1_irq(), move whole function body under
  CONFIG_NVGPU_FALCON_DEBUG to fix unused variable compilation errors.
- Add below TU104 specific files in safety build since some of the code
  in those files is required for GA10B. Unnecessary code will be
  compiled out later on.
	hal/gr/init/gr_init_tu104.c
	hal/class/class_tu104.c
	hal/mc/mc_tu104.c
	hal/fifo/usermode_tu104.c
	hal/gr/falcon/gr_falcon_tu104.c
- Compile out GA10B specific debugger/profiler related files from
  safety build.
- Disable CONFIG_NVGPU_FALCON_DEBUG from safety debug build temporarily
  to work around compilation errors seen with keeping this config
  enabled. Config will be re-enabled in safety debug build later.

Jira NVGPU-7276

Change-Id: I35f2489830ac083d52504ca411c3f1d96e72fc48
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2627048
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/hal/init/hal_ga10b.c

@@ -563,7 +563,9 @@ static const struct gops_gr_hwpm_map ga10b_ops_gr_hwpm_map = {
 static const struct gops_gr_init ga10b_ops_gr_init = {
 	.get_no_of_sm = nvgpu_gr_get_no_of_sm,
 	.get_nonpes_aware_tpc = gv11b_gr_init_get_nonpes_aware_tpc,
+#ifdef CONFIG_NVGPU_HAL_NON_FUSA
 	.wait_initialized = nvgpu_gr_wait_initialized,
+#endif
 	/* Since ecc scrubbing is moved to ctxsw ucode, setting HAL to NULL */
 	.ecc_scrub_reg = NULL,
 	.lg_coalesce = NULL,
@@ -761,8 +763,10 @@ static const struct gops_gr_falcon ga10b_ops_gr_falcon = {
 static const struct gops_gr ga10b_ops_gr = {
 	.gr_init_support = nvgpu_gr_init_support,
 	.gr_suspend = nvgpu_gr_suspend,
+#ifdef CONFIG_NVGPU_HAL_NON_FUSA
 	.vab_init = ga10b_gr_vab_init,
 	.vab_release = ga10b_gr_vab_release,
+#endif
 #ifdef CONFIG_NVGPU_DEBUGGER
 	.get_gr_status = gr_gm20b_get_gr_status,
 	.set_alpha_circular_buffer_size = gr_gv11b_set_alpha_circular_buffer_size,
@@ -856,6 +860,7 @@ static const struct gops_fb_intr ga10b_ops_fb_intr = {
 	.handle_ecc_fillunit = ga10b_fb_intr_handle_ecc_fillunit,
 };
 
+#ifdef CONFIG_NVGPU_HAL_NON_FUSA
 static const struct gops_fb_vab ga10b_ops_fb_vab = {
 	.init = ga10b_fb_vab_init,
 	.reserve = ga10b_fb_vab_reserve,
@@ -863,6 +868,7 @@ static const struct gops_fb_vab ga10b_ops_fb_vab = {
 	.release = ga10b_fb_vab_release,
 	.teardown = ga10b_fb_vab_teardown,
 };
+#endif
 
 static const struct gops_fb ga10b_ops_fb = {
 #ifdef CONFIG_NVGPU_INJECT_HWERR
@@ -1302,8 +1308,6 @@ static const struct gops_pmu ga10b_ops_pmu = {
 	.is_debug_mode_enabled = ga10b_pmu_is_debug_mode_en,
 	/* aperture set up is moved to acr */
 	.setup_apertures = NULL,
-	.secured_pmu_start = gv11b_secured_pmu_start,
-	.write_dmatrfbase = gv11b_write_dmatrfbase,
 	.flcn_setup_boot_config = gv11b_pmu_flcn_setup_boot_config,
 	.pmu_clear_bar0_host_err_status = gv11b_clear_pmu_bar0_host_err_status,
 	.bar0_error_status = gv11b_pmu_bar0_error_status,
@@ -1351,6 +1355,8 @@ static const struct gops_pmu ga10b_ops_pmu = {
 	.pmu_dump_falcon_stats = gk20a_pmu_dump_falcon_stats,
 	/* PMU ucode */
 	.pmu_ns_bootstrap = ga10b_pmu_ns_bootstrap,
+	.secured_pmu_start = gv11b_secured_pmu_start,
+	.write_dmatrfbase = gv11b_write_dmatrfbase,
 #endif
 };
 
@@ -1435,7 +1441,9 @@ static const struct gops_mc ga10b_ops_mc = {
 	.fb_reset = NULL,
 	.ltc_isr = mc_tu104_ltc_isr,
 	.is_mmu_fault_pending = ga10b_intr_is_mmu_fault_pending,
+#ifdef CONFIG_NVGPU_HAL_NON_FUSA
 	.intr_get_unit_info = ga10b_mc_intr_get_unit_info,
+#endif
 };
 
 static const struct gops_debug ga10b_ops_debug = {
@@ -1623,8 +1631,10 @@ static const struct gops_fuse ga10b_ops_fuse = {
 	.read_vin_cal_gain_offset_fuse = NULL,
 	.read_gcplex_config_fuse = ga10b_fuse_read_gcplex_config_fuse,
 	.fuse_status_opt_gpc = ga10b_fuse_status_opt_gpc,
+#if defined(CONFIG_NVGPU_HAL_NON_FUSA)
 	.write_feature_override_ecc = ga10b_fuse_write_feature_override_ecc,
 	.write_feature_override_ecc_1 = ga10b_fuse_write_feature_override_ecc_1,
+#endif
 	.read_feature_override_ecc = ga10b_fuse_read_feature_override_ecc,
 	.read_per_device_identifier = ga10b_fuse_read_per_device_identifier,
 	.fetch_falcon_fuse_settings = ga10b_fetch_falcon_fuse_settings,
@@ -1672,7 +1682,9 @@ static const struct gops_grmgr ga10b_ops_grmgr = {
 #else
 	.init_gr_manager = nvgpu_init_gr_manager,
 #endif
+#ifdef CONFIG_NVGPU_NON_FUSA
 	.load_timestamp_prod = ga10b_grmgr_load_smc_arb_timestamp_prod,
+#endif
 	.discover_gpc_ids = ga10b_grmgr_discover_gpc_ids,
 };
 
@@ -1721,7 +1733,9 @@ int ga10b_init_hal(struct gk20a *g)
 	gops->fb = ga10b_ops_fb;
 	gops->fb.ecc = ga10b_ops_fb_ecc;
 	gops->fb.intr = ga10b_ops_fb_intr;
+#ifdef CONFIG_NVGPU_HAL_NON_FUSA
 	gops->fb.vab = ga10b_ops_fb_vab;
+#endif
 	gops->cg = ga10b_ops_cg;
 	gops->fifo = ga10b_ops_fifo;
 	gops->engine = ga10b_ops_engine;