gpu: nvgpu: move header location of gk20a.h

Update header path of gk20a.h in files present in common/
to <nvgpu/gk20a.h>

Jira NVGPU-597

Change-Id: I3431dae93ada9bd561454c89a0b99c5292ab4a8d
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1832024
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Debarshi Dutta
2018-09-19 11:46:27 +05:30
committed by mobile promotions
parent 032860d8de
commit 421e64aad7
63 changed files with 73 additions and 114 deletions

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@@ -27,8 +27,7 @@
#include <nvgpu/kmem.h>
#include <nvgpu/vm.h>
#include <nvgpu/log2.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
/* dumb allocator... */
static int generate_as_share_id(struct gk20a_as *as)

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@@ -25,8 +25,8 @@
#include <nvgpu/mm.h>
#include <nvgpu/io.h>
#include <nvgpu/bug.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "bus_gk20a.h"
#include <nvgpu/hw/gk20a/hw_bus_gk20a.h>

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@@ -26,8 +26,8 @@
#include <nvgpu/mm.h>
#include <nvgpu/enabled.h>
#include <nvgpu/io.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "bus_gm20b.h"
#include <nvgpu/hw/gm20b/hw_bus_gm20b.h>

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@@ -23,9 +23,9 @@
#include <nvgpu/timers.h>
#include <nvgpu/mm.h>
#include <nvgpu/io.h>
#include <nvgpu/gk20a.h>
#include "bus_gp10b.h"
#include "gk20a/gk20a.h"
#include <nvgpu/hw/gp10b/hw_bus_gp10b.h>

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@@ -23,9 +23,9 @@
#include <nvgpu/timers.h>
#include <nvgpu/mm.h>
#include <nvgpu/io.h>
#include <nvgpu/gk20a.h>
#include "bus_gv100.h"
#include "gk20a/gk20a.h"
#include <nvgpu/hw/gv100/hw_bus_gv100.h>

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@@ -21,12 +21,12 @@
*/
#include <nvgpu/types.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/channel.h>
#include <nvgpu/utils.h>
#include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h>
#include "gk20a/gk20a.h"
#include "gk20a/ce2_gk20a.h"
#include "gk20a/fence_gk20a.h"

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@@ -20,7 +20,7 @@
* DEALINGS IN THE SOFTWARE.
*/
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
static void nvgpu_ecc_stat_add(struct gk20a *g, struct nvgpu_ecc_stat *stat)
{

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@@ -22,8 +22,7 @@
#include <nvgpu/enabled.h>
#include <nvgpu/bitops.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
int nvgpu_init_enabled_flags(struct gk20a *g)
{

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@@ -22,8 +22,7 @@
#include <nvgpu/lock.h>
#include <nvgpu/timers.h>
#include <nvgpu/falcon.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
/* Dealy depends on memory size and pwr_clk
* delay = MAX {IMEM_SIZE, DMEM_SIZE} * 64 + 1) / pwr_clk

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@@ -26,8 +26,7 @@
#include <nvgpu/sizes.h>
#include <nvgpu/utils.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include "fb_gm20b.h"

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@@ -20,14 +20,13 @@
* DEALINGS IN THE SOFTWARE.
*/
#include "gk20a/gk20a.h"
#include <nvgpu/io.h>
#include <nvgpu/timers.h>
#include <nvgpu/gk20a.h>
#include "fb_gp10b.h"
#include "fb_gp106.h"
#include <nvgpu/io.h>
#include <nvgpu/timers.h>
#include <nvgpu/hw/gp106/hw_fb_gp106.h>
#define HW_SCRUB_TIMEOUT_DEFAULT 100 /* usec */

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@@ -1,7 +1,7 @@
/*
* GP10B FB
*
* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -23,8 +23,8 @@
*/
#include <nvgpu/sizes.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "fb_gp10b.h"
unsigned int gp10b_fb_compression_page_size(struct gk20a *g)

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@@ -38,8 +38,7 @@
#include <nvgpu/io.h>
#include <nvgpu/utils.h>
#include <nvgpu/timers.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include "fb_gv100.h"

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@@ -33,9 +33,9 @@
#include <nvgpu/io.h>
#include <nvgpu/utils.h>
#include <nvgpu/timers.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/channel.h>
#include "gk20a/gk20a.h"
#include "gk20a/mm_gk20a.h"
#include "gv11b/fifo_gv11b.h"

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@@ -43,10 +43,10 @@
#include <nvgpu/os_sched.h>
#include <nvgpu/log2.h>
#include <nvgpu/ptimer.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/channel.h>
#include <nvgpu/channel_sync.h>
#include "gk20a/gk20a.h"
#include "gk20a/dbg_gpu_gk20a.h"
#include "gk20a/fence_gk20a.h"

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@@ -20,6 +20,7 @@
* DEALINGS IN THE SOFTWARE.
*/
#include <nvgpu/gk20a.h>
#include <nvgpu/channel.h>
#include <nvgpu/ltc.h>
#include <nvgpu/os_sched.h>
@@ -28,7 +29,6 @@
#include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h>
#include "gk20a/gk20a.h"
#include "gk20a/fence_gk20a.h"
#include <trace/events/gk20a.h>

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@@ -26,8 +26,7 @@
#include <nvgpu/fuse.h>
#include <nvgpu/enabled.h>
#include <nvgpu/io.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include "fuse_gm20b.h"

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@@ -24,8 +24,7 @@
#include <nvgpu/enabled.h>
#include <nvgpu/io.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include "fuse_gp106.h"

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@@ -26,8 +26,7 @@
#include <nvgpu/fuse.h>
#include <nvgpu/enabled.h>
#include <nvgpu/io.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include "fuse_gm20b.h"
#include "fuse_gp10b.h"

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@@ -13,8 +13,7 @@
#include <nvgpu/io.h>
#include <nvgpu/types.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
void nvgpu_writel_check(struct gk20a *g, u32 r, u32 v)
{

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@@ -23,8 +23,8 @@
#include <nvgpu/ltc.h>
#include <nvgpu/dma.h>
#include <nvgpu/nvgpu_mem.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "gk20a/gr_gk20a.h"
int nvgpu_init_ltc_support(struct gk20a *g)

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@@ -30,14 +30,13 @@
#include <nvgpu/ltc.h>
#include <nvgpu/io.h>
#include <nvgpu/utils.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/hw/gm20b/hw_mc_gm20b.h>
#include <nvgpu/hw/gm20b/hw_ltc_gm20b.h>
#include <nvgpu/hw/gm20b/hw_top_gm20b.h>
#include <nvgpu/hw/gm20b/hw_pri_ringmaster_gm20b.h>
#include "gk20a/gk20a.h"
#include "ltc_gm20b.h"
int gm20b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr)

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@@ -29,12 +29,11 @@
#include <nvgpu/enabled.h>
#include <nvgpu/io.h>
#include <nvgpu/timers.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/hw/gp10b/hw_mc_gp10b.h>
#include <nvgpu/hw/gp10b/hw_ltc_gp10b.h>
#include "gk20a/gk20a.h"
#include "ltc_gm20b.h"
#include "ltc_gp10b.h"

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@@ -23,7 +23,7 @@
*/
#include <nvgpu/io.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include "ltc_gp10b.h"
#include "ltc_gv11b.h"

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@@ -24,8 +24,7 @@
#include <nvgpu/io.h>
#include <nvgpu/mc.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include <nvgpu/hw/gm20b/hw_mc_gm20b.h>

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@@ -27,8 +27,8 @@
#include <nvgpu/unit.h>
#include <nvgpu/io.h>
#include <nvgpu/mc.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "mc_gm20b.h"
#include <nvgpu/hw/gm20b/hw_mc_gm20b.h>

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@@ -22,7 +22,7 @@
* DEALINGS IN THE SOFTWARE.
*/
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include <nvgpu/io.h>
#include <nvgpu/mc.h>

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@@ -25,8 +25,7 @@
#include <nvgpu/types.h>
#include <nvgpu/io.h>
#include <nvgpu/mc.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include "mc_gp10b.h"
#include "mc_gv100.h"

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@@ -25,8 +25,7 @@
#include <nvgpu/types.h>
#include <nvgpu/io.h>
#include <nvgpu/mc.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include "mc_gp10b.h"
#include "mc_gv11b.h"

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@@ -23,8 +23,7 @@
#include <nvgpu/bug.h>
#include <nvgpu/bitops.h>
#include <nvgpu/comptags.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
int gk20a_comptaglines_alloc(struct gk20a_comptag_allocator *allocator,
u32 *offset, u32 len)

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@@ -32,8 +32,8 @@
#include <nvgpu/vidmem.h>
#include <nvgpu/sizes.h>
#include <nvgpu/types.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "gk20a/mm_gk20a.h"
#define __gmmu_dbg(g, attrs, fmt, args...) \

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@@ -29,8 +29,7 @@
#include <nvgpu/semaphore.h>
#include <nvgpu/pramin.h>
#include <nvgpu/enabled.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
/*
* Attempt to find a reserved memory area to determine PTE size for the passed

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@@ -23,8 +23,8 @@
*/
#include <nvgpu/allocator.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "gk20a/mm_gk20a.h"
u64 nvgpu_alloc_length(struct nvgpu_allocator *a)

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@@ -25,9 +25,7 @@
#include <nvgpu/nvgpu_mem.h>
#include <nvgpu/dma.h>
#include <nvgpu/vidmem.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
/*
* Make sure to use the right coherency aperture if you use this function! This
* will not add any checks. If you want to simply use the default coherency then

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@@ -27,8 +27,8 @@
#include <nvgpu/nvgpu_mem.h>
#include <nvgpu/list.h>
#include <nvgpu/log2.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "gk20a/mm_gk20a.h"
#define pd_dbg(g, fmt, args...) nvgpu_log(g, gpu_dbg_pd_cache, fmt, ##args)

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@@ -27,8 +27,8 @@
#include <nvgpu/page_allocator.h>
#include <nvgpu/enabled.h>
#include <nvgpu/sizes.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "gk20a/mm_gk20a.h"
#include "gk20a/fence_gk20a.h"

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@@ -34,10 +34,9 @@
#include <nvgpu/enabled.h>
#include <nvgpu/sizes.h>
#include <nvgpu/timers.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/vgpu/vm.h>
#include "gk20a/gk20a.h"
#include "gk20a/mm_gk20a.h"
struct nvgpu_ctag_buffer_info {

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@@ -23,8 +23,8 @@
#include <nvgpu/vm.h>
#include <nvgpu/vm_area.h>
#include <nvgpu/barrier.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "gk20a/mm_gk20a.h"
struct nvgpu_vm_area *nvgpu_vm_area_find(struct vm_gk20a *vm, u64 addr)

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@@ -14,7 +14,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <gk20a/gk20a.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/nvlink.h>
#include <nvgpu/enabled.h>

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@@ -29,8 +29,7 @@
#include <nvgpu/timers.h>
#include <nvgpu/bug.h>
#include <nvgpu/utils.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
static int nvgpu_pg_init_task(void *arg);

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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -25,10 +25,9 @@
#include <nvgpu/timers.h>
#include <nvgpu/kmem.h>
#include <nvgpu/dma.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
#include "gk20a/gk20a.h"
void nvgpu_pmu_dump_elpg_stats(struct nvgpu_pmu *pmu)
{
struct gk20a *g = pmu->g;

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@@ -27,8 +27,7 @@
#include <nvgpu/firmware.h>
#include <nvgpu/enabled.h>
#include <nvgpu/utils.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include "boardobj/boardobj.h"
#include "boardobj/boardobjgrp.h"

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@@ -27,8 +27,7 @@
#include <nvgpu/bug.h>
#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
#include <nvgpu/falcon.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
void nvgpu_pmu_seq_init(struct nvgpu_pmu *pmu)
{

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@@ -25,8 +25,7 @@
#include <nvgpu/log.h>
#include <nvgpu/bug.h>
#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
static u8 get_perfmon_id(struct nvgpu_pmu *pmu)
{

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@@ -26,8 +26,7 @@
#include <nvgpu/barrier.h>
#include <nvgpu/bug.h>
#include <nvgpu/utils.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
/* state transition :
* OFF => [OFF_ON_PENDING optional] => ON_PENDING => ON => OFF

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@@ -25,8 +25,7 @@
#include <nvgpu/enabled.h>
#include <nvgpu/sizes.h>
#include <nvgpu/io.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
/*
* This typedef is for functions that get called during the access_batched()

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@@ -20,8 +20,7 @@
* DEALINGS IN THE SOFTWARE.
*/
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include <nvgpu/log.h>
#include <nvgpu/timers.h>
#include <nvgpu/enabled.h>

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@@ -22,13 +22,12 @@
* DEALINGS IN THE SOFTWARE.
*/
#include "gk20a/gk20a.h"
#include <nvgpu/log.h>
#include <nvgpu/timers.h>
#include <nvgpu/enabled.h>
#include <nvgpu/io.h>
#include <nvgpu/utils.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/hw/gp10b/hw_pri_ringmaster_gp10b.h>
#include <nvgpu/hw/gp10b/hw_pri_ringstation_sys_gp10b.h>

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@@ -22,8 +22,7 @@
#include <nvgpu/ptimer.h>
#include <nvgpu/timers.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
int nvgpu_get_timestamps_zipper(struct gk20a *g,
u32 source_id, u32 count,

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@@ -22,8 +22,8 @@
#include <nvgpu/log.h>
#include <nvgpu/io.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "ptimer_gk20a.h"
#include <nvgpu/hw/gk20a/hw_timer_gk20a.h>

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@@ -29,8 +29,8 @@
#include <nvgpu/bug.h>
#include <nvgpu/sizes.h>
#include <nvgpu/channel.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "gk20a/mm_gk20a.h"
#define pool_to_gk20a(p) ((p)->sema_sea->gk20a)

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@@ -29,8 +29,7 @@
#include <nvgpu/sim.h>
#include <nvgpu/utils.h>
#include <nvgpu/bug.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
int nvgpu_alloc_sim_buffer(struct gk20a *g, struct nvgpu_mem *mem)
{

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@@ -28,8 +28,7 @@
#include <nvgpu/io.h>
#include <nvgpu/utils.h>
#include <nvgpu/bug.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
static inline u32 sim_msg_header_size(void)
{

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@@ -29,11 +29,11 @@
#include <nvgpu/bug.h>
#include <nvgpu/list.h>
#include <nvgpu/nvhost.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/os_fence.h>
#include <nvgpu/channel.h>
#include <nvgpu/channel_sync.h>
#include "gk20a/gk20a.h"
#include "gk20a/fence_gk20a.h"
#include "gk20a/mm_gk20a.h"

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@@ -23,8 +23,7 @@
#include <nvgpu/types.h>
#include <nvgpu/log.h>
#include <nvgpu/therm.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
int nvgpu_init_therm_support(struct gk20a *g)
{

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@@ -23,7 +23,7 @@
*/
#include <nvgpu/io.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include "therm_gm20b.h"

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@@ -21,8 +21,7 @@
*/
#include <nvgpu/io.h>
#include "gk20a/gk20a.h"
#include <nvgpu/gk20a.h>
#include "therm_gp106.h"
#include "therm/thrmpmu.h"

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@@ -21,13 +21,12 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "gk20a/gk20a.h"
#include "therm_gp10b.h"
#include <nvgpu/soc.h>
#include <nvgpu/io.h>
#include <nvgpu/utils.h>
#include <nvgpu/gk20a.h>
#include "therm_gp10b.h"
#include <nvgpu/hw/gp10b/hw_therm_gp10b.h>

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@@ -21,18 +21,15 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "gk20a/gk20a.h"
#include "therm_gv11b.h"
#include <nvgpu/soc.h>
#include <nvgpu/io.h>
#include <nvgpu/utils.h>
#include <nvgpu/hw/gv11b/hw_therm_gv11b.h>
#include <nvgpu/gk20a.h>
#include "therm_gv11b.h"
#include <nvgpu/hw/gv11b/hw_therm_gv11b.h>
int gv11b_init_therm_setup_hw(struct gk20a *g)
{
u32 v;

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@@ -23,8 +23,8 @@
*/
#include <nvgpu/io.h>
#include <nvgpu/gk20a.h>
#include "gk20a/gk20a.h"
#include "top_gv100.h"
#include <nvgpu/hw/gv100/hw_top_gv100.h>

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@@ -22,10 +22,9 @@
#include <nvgpu/bios.h>
#include <nvgpu/io.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/hw/gp106/hw_gc6_gp106.h>
#include "gk20a/gk20a.h"
#define BIT_HEADER_ID 0xb8ffU
#define BIT_HEADER_SIGNATURE 0x00544942U
#define PCI_EXP_ROM_SIG 0xaa55U

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@@ -19,15 +19,14 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "gk20a/gk20a.h"
#include "gp106/bios_gp106.h"
#include <nvgpu/bug.h>
#include <nvgpu/xve.h>
#include <nvgpu/io.h>
#include <nvgpu/utils.h>
#include <nvgpu/timers.h>
#include <nvgpu/gk20a.h>
#include "gp106/bios_gp106.h"
#include "xve_gp106.h"

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@@ -23,10 +23,9 @@
#ifndef NVGPU_XVE_GP106_H
#define NVGPU_XVE_GP106_H
#include "gk20a/gk20a.h"
#include <nvgpu/log2.h>
#include <nvgpu/types.h>
#include <nvgpu/gk20a.h>
int gp106_init_xve_ops(struct gpu_ops *gops);