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gpu: nvgpu: use hww_esr_reset field to reset hwww_esr

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Use hww_esr_reset field to clear hww errors

Change-Id: I4b5da20c8a4bcfe2dea357d3d2ebd53678673b48
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1500965
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Seema Khowala
2017-06-12 14:21:12 -07:00
committed by mobile promotions
parent 64050935e9
commit 45355f00e7
1 changed files with 6 additions and 3 deletions
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9
drivers/gpu/nvgpu/gk20a/gr_gk20a.c
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@@ -6558,14 +6558,16 @@ int gk20a_gr_isr(struct gk20a *g)
if (exception & gr_exception_fe_m()) {
u32 fe = gk20a_readl(g, gr_fe_hww_esr_r());
nvgpu_err(g, "fe warning %08x", fe);
gk20a_writel(g, gr_fe_hww_esr_r(), fe);
gk20a_writel(g, gr_fe_hww_esr_r(),
gr_fe_hww_esr_reset_active_f());
need_reset |= -EFAULT;
}
if (exception & gr_exception_memfmt_m()) {
u32 memfmt = gk20a_readl(g, gr_memfmt_hww_esr_r());
nvgpu_err(g, "memfmt exception %08x", memfmt);
gk20a_writel(g, gr_memfmt_hww_esr_r(), memfmt);
gk20a_writel(g, gr_memfmt_hww_esr_r(),
gr_memfmt_hww_esr_reset_active_f());
need_reset |= -EFAULT;
}
@@ -6594,7 +6596,8 @@ int gk20a_gr_isr(struct gk20a *g)
if (exception & gr_exception_ds_m()) {
u32 ds = gk20a_readl(g, gr_ds_hww_esr_r());
nvgpu_err(g, "ds exception %08x", ds);
gk20a_writel(g, gr_ds_hww_esr_r(), ds);
gk20a_writel(g, gr_ds_hww_esr_r(),
gr_ds_hww_esr_reset_task_f());
need_reset |= -EFAULT;
}