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gpu: nvgpu: remove golden_image_initialized flag from gr_gk20a struct
struct gr_gk20a defines boolean flag golden_image_initialized to indicate if golden_image is initialized or not common.gr.obj_ctx also added a flag of its own to check if golden_image is ready Add new API nvgpu_gr_obj_ctx_is_golden_image_ready() in common.gr.obj_ctx unit to get status of golden_image Use this new API everywhere to check if golden image is ready Remove g->gr.ctx_vars.golden_image_initialized Also remove ctx_mutex from struct gr_gk20a Add new flag golden_image_initialized to struct nvgpu_pmu_pg and set it when golden image is initialized. This is needed to avoid circular dependency between GR and PMU Jira NVGPU-3112 Change-Id: Id391294cede6424e15a9a9de29c40d013b509534 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2099400 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -280,7 +280,6 @@ static void gr_remove_support(struct gk20a *g)
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nvgpu_gr_zbc_deinit(g, gr->zbc);
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nvgpu_gr_zcull_deinit(g, gr->zcull);
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nvgpu_gr_obj_ctx_deinit(g, gr->golden_image);
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gr->ctx_vars.golden_image_initialized = false;
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}
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static int gr_init_access_map(struct gk20a *g, struct nvgpu_gr *gr)
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@@ -368,6 +367,16 @@ clean_up:
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return -ENOMEM;
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}
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static int nvgpu_gr_init_ctx_state(struct gk20a *g)
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{
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if (g->gr->golden_image != NULL &&
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nvgpu_gr_obj_ctx_is_golden_image_ready(g->gr->golden_image)) {
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return 0;
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}
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return nvgpu_gr_falcon_init_ctx_state(g);
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}
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static int gr_init_setup_sw(struct gk20a *g)
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{
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struct nvgpu_gr *gr = g->gr;
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@@ -451,12 +460,6 @@ static int gr_init_setup_sw(struct gk20a *g)
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goto clean_up;
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}
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err = nvgpu_mutex_init(&gr->ctx_mutex);
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if (err != 0) {
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nvgpu_err(g, "Error in gr.ctx_mutex initialization");
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goto clean_up;
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}
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nvgpu_spinlock_init(&gr->ch_tlb_lock);
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gr->remove_support = gr_remove_support;
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@@ -603,7 +606,7 @@ int nvgpu_gr_reset(struct gk20a *g)
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/* this appears query for sw states but fecs actually init
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ramchain, etc so this is hw init */
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err = nvgpu_gr_falcon_init_ctx_state(g);
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err = nvgpu_gr_init_ctx_state(g);
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if (err != 0) {
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return err;
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}
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@@ -640,7 +643,7 @@ int nvgpu_gr_init_support(struct gk20a *g)
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/* this appears query for sw states but fecs actually init
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ramchain, etc so this is hw init */
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err = nvgpu_gr_falcon_init_ctx_state(g);
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err = nvgpu_gr_init_ctx_state(g);
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if (err != 0) {
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return err;
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}
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