gpu: nvgpu: BVEC test for common.gr

Add BVEC test for below APIs:
nvgpu_gr_setup_alloc_obj_ctx
nvgpu_gr_setup_set_preemption_mode

JIRA NVGPU-6389

Signed-off-by: tkudav <tkudav@nvidia.com>
Change-Id: Ib42431e1fb85e42b2767fa6ba2212c3ec578f487
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2548282
(cherry picked from commit 7d59394a11e680b8118684e38d7fa5de2be20da9)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2555075
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
tkudav
2021-06-25 16:42:26 +05:30
committed by mobile promotions
parent 82094aca61
commit 4856e709f8
2 changed files with 154 additions and 9 deletions

View File

@@ -51,6 +51,14 @@
#include "../nvgpu-gr.h"
#include "nvgpu-gr-setup.h"
#define CLASS_MIN_VALUE 0
#define CLASS_MAX_VALUE U32_MAX
#define CLASS_VALID_VALUE 0x1234
#define FLAGS_MIN_VALUE 0
#define FLAGS_MAX_VALUE U32_MAX
#define FLAGS_VALID_VALUE 0x1234
struct gr_gops_org {
int (*l2_flush)(struct gk20a *g, bool invalidate);
int (*fe_pwr_mode)(struct gk20a *g, bool force_on);
@@ -59,12 +67,24 @@ struct gr_gops_org {
u32 data, u32 *ret_val);
int (*fifo_preempt_tsg)(struct gk20a *g,
struct nvgpu_tsg *tsg);
bool (*is_valid)(u32 class_num);
bool (*is_valid_compute)(u32 class_num);
};
static struct nvgpu_channel *gr_setup_ch;
static struct nvgpu_tsg *gr_setup_tsg;
static struct gr_gops_org gr_setup_gops;
static bool stub_class_is_valid(u32 class_num)
{
return true;
}
static bool stub_class_is_valid_compute(u32 class_num)
{
return true;
}
static u32 stub_channel_count(struct gk20a *g)
{
return 4;
@@ -104,6 +124,28 @@ static int stub_gr_fifo_preempt_tsg(struct gk20a *g, struct nvgpu_tsg *tsg)
return -1;
}
static void gr_setup_stub_class_ops(struct gk20a *g)
{
g->ops.gpu_class.is_valid = stub_class_is_valid;
g->ops.gpu_class.is_valid_compute = stub_class_is_valid_compute;
}
static void gr_setup_restore_class_ops(struct gk20a *g)
{
g->ops.gpu_class.is_valid =
gr_setup_gops.is_valid;
g->ops.gpu_class.is_valid_compute =
gr_setup_gops.is_valid_compute;
}
static void gr_setup_save_class_ops(struct gk20a *g)
{
gr_setup_gops.is_valid =
g->ops.gpu_class.is_valid;
gr_setup_gops.is_valid_compute =
g->ops.gpu_class.is_valid_compute;
}
static int gr_test_setup_unbind_tsg(struct unit_module *m, struct gk20a *g)
{
int err = 0;
@@ -247,17 +289,17 @@ struct test_gr_setup_preemption_mode {
struct test_gr_setup_preemption_mode preemp_mode_types[] = {
[0] = {
.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CTA,
.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_WFI,
.graphics_mode = 0,
.result = 0,
},
[1] = {
.compute_mode = BIT(2),
.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CTA,
.graphics_mode = 0,
.result = -EINVAL,
.result = 0,
},
[2] = {
.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_WFI,
.compute_mode = BIT(15),
.graphics_mode = 0,
.result = -EINVAL,
},
@@ -268,7 +310,27 @@ struct test_gr_setup_preemption_mode preemp_mode_types[] = {
},
[4] = {
.compute_mode = 0,
.graphics_mode = BIT(1),
.graphics_mode = BIT(0),
.result = -EINVAL,
},
[5] = {
.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CTA,
.graphics_mode = BIT(12),
.result = -EINVAL,
},
[6] = {
.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CTA,
.graphics_mode = U32_MAX,
.result = -EINVAL,
},
[7] = {
.compute_mode = 3,
.graphics_mode = 0,
.result = -EINVAL,
},
[8] = {
.compute_mode = U32_MAX,
.graphics_mode = 0,
.result = -EINVAL,
},
};
@@ -607,7 +669,7 @@ int test_gr_setup_set_preemption_mode(struct unit_module *m,
&compute_mode);
err = g->ops.gr.setup.set_preemption_mode(gr_setup_ch, 0,
(compute_mode & NVGPU_PREEMPTION_MODE_COMPUTE_CTA), 0);
(compute_mode & NVGPU_PREEMPTION_MODE_COMPUTE_WFI), 0);
if (err != 0) {
unit_return_fail(m, "setup preemption_mode failed\n");
}
@@ -664,6 +726,53 @@ int test_gr_setup_alloc_obj_ctx(struct unit_module *m,
unit_return_fail(m, "setup channel allocation failed\n");
}
/* BVEC tests for variable class_num */
gr_setup_save_class_ops(g);
gr_setup_stub_class_ops(g);
err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, CLASS_MIN_VALUE, 0);
if (err != 0) {
unit_return_fail(m,
"alloc_obj_ctx BVEC class_num min_value failed.\n");
}
err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, CLASS_MAX_VALUE, 0);
if (err != 0) {
unit_return_fail(m,
"alloc_obj_ctx BVEC class_num max_value failed.\n");
}
err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, CLASS_VALID_VALUE, 0);
if (err != 0) {
unit_return_fail(m,
"alloc_obj_ctx BVEC class_num valid_value failed.\n");
}
gr_setup_restore_class_ops(g);
/* BVEC tests for variable flags */
err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, VOLTA_DMA_COPY_A,
FLAGS_MIN_VALUE);
if (err != 0) {
unit_return_fail(m,
"alloc_obj_ctx BVEC flags min_value failed.\n");
}
err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, VOLTA_DMA_COPY_A,
FLAGS_MAX_VALUE);
if (err != 0) {
unit_return_fail(m,
"alloc_obj_ctx BVEC flags max_value failed.\n");
}
err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, VOLTA_DMA_COPY_A,
FLAGS_VALID_VALUE);
if (err != 0) {
unit_return_fail(m,
"alloc_obj_ctx BVEC flags valid_value failed.\n");
}
/* End BVEC tests */
/* DMA_COPY should pass, but it own't allocate obj ctx */
err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, VOLTA_DMA_COPY_A, 0);
if (err != 0) {

View File

@@ -38,7 +38,17 @@ struct unit_module;
*
* Description: This test helps to verify common.gr object context creation.
*
* Test Type: Feature
* Test Type: Feature, Boundary Value
*
* Equivalence classes:
* Variable: class_num
* - Valid : {0 - U32_MAX}
* Range of "class_num" variable for nvgpu-rm is
* 0xC3C0U (VOLTA_COMPUTE_A), 0xC3B5U (VOLTA_DMA_COPY_A),
* 0xC36FU (VOLTA_CHANNEL_GPFIFO_A).
* class_num range check is done in common.class unit.
* Variable: flags
* - Valid : {0 - U32_MAX}
*
* Targets: nvgpu_gr_setup_alloc_obj_ctx,
* nvgpu_gr_obj_ctx_alloc,
@@ -75,7 +85,24 @@ struct unit_module;
* - g->ops.gr.falcon.ctrl_ctxsw.
* - Set default golden image size.
* - Allocate and bind channel and tsg.
* - Call g->ops.gr.setup.alloc_obj_ctx.
* - Start BVEC testing for variable class_num.
* class_num is tested for range in common.class. In common.gr, stub out
* the common.class HALs to perform independent range testing. Before
* stubbing, save the valid initialization values for common.class HALs.
* - Call g->ops.gr.setup.alloc_obj_ctx with input class_num at boundary
* values - min boundary(0), max boundary(U32_MAX) and once with value
* in valid range. g->ops.gr.setup.alloc_obj_ctx value should return
* 0 as all class_num values are valid from common.gr perspective.
* End BVEC testing for variable class_num by restoring the stubbed
* common.class HALs.
* - Start BVEC testing for variable flags.
* - Call g->ops.gr.setup.alloc_obj_ctx with input variable flags at boundary
* values - min boundary(0), max boundary(U32_MAX) and once with value
* in valid range. g->ops.gr.setup.alloc_obj_ctx value should return
* 0 as all flags values are valid from common.gr perspective.
* End BVEC testing for variable flags.
* - Call g->ops.gr.setup.alloc_obj_ctx with valid class_num -
* VOLTA_DMA_COPY_A and VOLTA_COMPUTE_A.
*
* Output: Returns PASS if the steps above were executed successfully. FAIL
* otherwise.
@@ -153,7 +180,16 @@ int test_gr_setup_free_obj_ctx(struct unit_module *m,
* Description: Helps to verify error paths in
* gops_gr_setup.set_preemption_mode call.
*
* Test Type: Error injection, Boundary values
* Test Type: Error injection, Boundary value
*
* Equivalence classes:
* Variable : graphics_preempt_mode
* - Valid : {0}
* - Invalid : {1 - U32_MAX}
* Variable : compute_preempt_mode
* - Valid : {0,2}
* - Invalid : {3 - U32_MAX}
*
*
* Targets: nvgpu_gr_setup_set_preemption_mode,
* nvgpu_gr_obj_ctx_set_ctxsw_preemption_mode