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gpu: nvgpu: BVEC test for common.gr
Add BVEC test for below APIs: nvgpu_gr_setup_alloc_obj_ctx nvgpu_gr_setup_set_preemption_mode JIRA NVGPU-6389 Signed-off-by: tkudav <tkudav@nvidia.com> Change-Id: Ib42431e1fb85e42b2767fa6ba2212c3ec578f487 Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2548282 (cherry picked from commit 7d59394a11e680b8118684e38d7fa5de2be20da9) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2555075 Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -51,6 +51,14 @@
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#include "../nvgpu-gr.h"
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#include "nvgpu-gr-setup.h"
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#define CLASS_MIN_VALUE 0
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#define CLASS_MAX_VALUE U32_MAX
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#define CLASS_VALID_VALUE 0x1234
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#define FLAGS_MIN_VALUE 0
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#define FLAGS_MAX_VALUE U32_MAX
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#define FLAGS_VALID_VALUE 0x1234
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struct gr_gops_org {
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int (*l2_flush)(struct gk20a *g, bool invalidate);
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int (*fe_pwr_mode)(struct gk20a *g, bool force_on);
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@@ -59,12 +67,24 @@ struct gr_gops_org {
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u32 data, u32 *ret_val);
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int (*fifo_preempt_tsg)(struct gk20a *g,
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struct nvgpu_tsg *tsg);
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bool (*is_valid)(u32 class_num);
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bool (*is_valid_compute)(u32 class_num);
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};
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static struct nvgpu_channel *gr_setup_ch;
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static struct nvgpu_tsg *gr_setup_tsg;
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static struct gr_gops_org gr_setup_gops;
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static bool stub_class_is_valid(u32 class_num)
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{
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return true;
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}
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static bool stub_class_is_valid_compute(u32 class_num)
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{
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return true;
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}
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static u32 stub_channel_count(struct gk20a *g)
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{
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return 4;
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@@ -104,6 +124,28 @@ static int stub_gr_fifo_preempt_tsg(struct gk20a *g, struct nvgpu_tsg *tsg)
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return -1;
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}
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static void gr_setup_stub_class_ops(struct gk20a *g)
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{
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g->ops.gpu_class.is_valid = stub_class_is_valid;
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g->ops.gpu_class.is_valid_compute = stub_class_is_valid_compute;
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}
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static void gr_setup_restore_class_ops(struct gk20a *g)
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{
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g->ops.gpu_class.is_valid =
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gr_setup_gops.is_valid;
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g->ops.gpu_class.is_valid_compute =
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gr_setup_gops.is_valid_compute;
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}
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static void gr_setup_save_class_ops(struct gk20a *g)
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{
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gr_setup_gops.is_valid =
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g->ops.gpu_class.is_valid;
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gr_setup_gops.is_valid_compute =
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g->ops.gpu_class.is_valid_compute;
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}
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static int gr_test_setup_unbind_tsg(struct unit_module *m, struct gk20a *g)
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{
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int err = 0;
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@@ -247,17 +289,17 @@ struct test_gr_setup_preemption_mode {
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struct test_gr_setup_preemption_mode preemp_mode_types[] = {
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[0] = {
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.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CTA,
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.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_WFI,
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.graphics_mode = 0,
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.result = 0,
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},
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[1] = {
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.compute_mode = BIT(2),
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.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CTA,
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.graphics_mode = 0,
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.result = -EINVAL,
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.result = 0,
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},
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[2] = {
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.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_WFI,
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.compute_mode = BIT(15),
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.graphics_mode = 0,
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.result = -EINVAL,
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},
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@@ -268,7 +310,27 @@ struct test_gr_setup_preemption_mode preemp_mode_types[] = {
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},
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[4] = {
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.compute_mode = 0,
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.graphics_mode = BIT(1),
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.graphics_mode = BIT(0),
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.result = -EINVAL,
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},
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[5] = {
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.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CTA,
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.graphics_mode = BIT(12),
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.result = -EINVAL,
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},
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[6] = {
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.compute_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CTA,
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.graphics_mode = U32_MAX,
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.result = -EINVAL,
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},
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[7] = {
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.compute_mode = 3,
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.graphics_mode = 0,
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.result = -EINVAL,
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},
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[8] = {
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.compute_mode = U32_MAX,
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.graphics_mode = 0,
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.result = -EINVAL,
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},
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};
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@@ -607,7 +669,7 @@ int test_gr_setup_set_preemption_mode(struct unit_module *m,
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&compute_mode);
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err = g->ops.gr.setup.set_preemption_mode(gr_setup_ch, 0,
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(compute_mode & NVGPU_PREEMPTION_MODE_COMPUTE_CTA), 0);
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(compute_mode & NVGPU_PREEMPTION_MODE_COMPUTE_WFI), 0);
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if (err != 0) {
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unit_return_fail(m, "setup preemption_mode failed\n");
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}
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@@ -664,6 +726,53 @@ int test_gr_setup_alloc_obj_ctx(struct unit_module *m,
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unit_return_fail(m, "setup channel allocation failed\n");
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}
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/* BVEC tests for variable class_num */
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gr_setup_save_class_ops(g);
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gr_setup_stub_class_ops(g);
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err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, CLASS_MIN_VALUE, 0);
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if (err != 0) {
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unit_return_fail(m,
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"alloc_obj_ctx BVEC class_num min_value failed.\n");
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}
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err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, CLASS_MAX_VALUE, 0);
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if (err != 0) {
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unit_return_fail(m,
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"alloc_obj_ctx BVEC class_num max_value failed.\n");
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}
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err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, CLASS_VALID_VALUE, 0);
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if (err != 0) {
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unit_return_fail(m,
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"alloc_obj_ctx BVEC class_num valid_value failed.\n");
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}
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gr_setup_restore_class_ops(g);
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/* BVEC tests for variable flags */
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err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, VOLTA_DMA_COPY_A,
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FLAGS_MIN_VALUE);
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if (err != 0) {
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unit_return_fail(m,
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"alloc_obj_ctx BVEC flags min_value failed.\n");
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}
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err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, VOLTA_DMA_COPY_A,
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FLAGS_MAX_VALUE);
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if (err != 0) {
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unit_return_fail(m,
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"alloc_obj_ctx BVEC flags max_value failed.\n");
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}
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err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, VOLTA_DMA_COPY_A,
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FLAGS_VALID_VALUE);
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if (err != 0) {
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unit_return_fail(m,
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"alloc_obj_ctx BVEC flags valid_value failed.\n");
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}
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/* End BVEC tests */
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/* DMA_COPY should pass, but it own't allocate obj ctx */
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err = g->ops.gr.setup.alloc_obj_ctx(gr_setup_ch, VOLTA_DMA_COPY_A, 0);
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if (err != 0) {
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@@ -38,7 +38,17 @@ struct unit_module;
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*
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* Description: This test helps to verify common.gr object context creation.
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*
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* Test Type: Feature
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* Test Type: Feature, Boundary Value
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*
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* Equivalence classes:
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* Variable: class_num
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* - Valid : {0 - U32_MAX}
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* Range of "class_num" variable for nvgpu-rm is
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* 0xC3C0U (VOLTA_COMPUTE_A), 0xC3B5U (VOLTA_DMA_COPY_A),
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* 0xC36FU (VOLTA_CHANNEL_GPFIFO_A).
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* class_num range check is done in common.class unit.
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* Variable: flags
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* - Valid : {0 - U32_MAX}
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*
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* Targets: nvgpu_gr_setup_alloc_obj_ctx,
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* nvgpu_gr_obj_ctx_alloc,
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@@ -75,7 +85,24 @@ struct unit_module;
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* - g->ops.gr.falcon.ctrl_ctxsw.
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* - Set default golden image size.
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* - Allocate and bind channel and tsg.
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* - Call g->ops.gr.setup.alloc_obj_ctx.
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* - Start BVEC testing for variable class_num.
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* class_num is tested for range in common.class. In common.gr, stub out
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* the common.class HALs to perform independent range testing. Before
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* stubbing, save the valid initialization values for common.class HALs.
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* - Call g->ops.gr.setup.alloc_obj_ctx with input class_num at boundary
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* values - min boundary(0), max boundary(U32_MAX) and once with value
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* in valid range. g->ops.gr.setup.alloc_obj_ctx value should return
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* 0 as all class_num values are valid from common.gr perspective.
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* End BVEC testing for variable class_num by restoring the stubbed
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* common.class HALs.
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* - Start BVEC testing for variable flags.
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* - Call g->ops.gr.setup.alloc_obj_ctx with input variable flags at boundary
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* values - min boundary(0), max boundary(U32_MAX) and once with value
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* in valid range. g->ops.gr.setup.alloc_obj_ctx value should return
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* 0 as all flags values are valid from common.gr perspective.
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* End BVEC testing for variable flags.
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* - Call g->ops.gr.setup.alloc_obj_ctx with valid class_num -
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* VOLTA_DMA_COPY_A and VOLTA_COMPUTE_A.
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*
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* Output: Returns PASS if the steps above were executed successfully. FAIL
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* otherwise.
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@@ -153,7 +180,16 @@ int test_gr_setup_free_obj_ctx(struct unit_module *m,
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* Description: Helps to verify error paths in
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* gops_gr_setup.set_preemption_mode call.
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*
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* Test Type: Error injection, Boundary values
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* Test Type: Error injection, Boundary value
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*
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* Equivalence classes:
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* Variable : graphics_preempt_mode
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* - Valid : {0}
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* - Invalid : {1 - U32_MAX}
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* Variable : compute_preempt_mode
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* - Valid : {0,2}
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* - Invalid : {3 - U32_MAX}
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*
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*
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* Targets: nvgpu_gr_setup_set_preemption_mode,
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* nvgpu_gr_obj_ctx_set_ctxsw_preemption_mode
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