nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 10:34:43 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: Move clk bypass div code to clk init

Browse Source 
Clock bypass divider was changed just before resetting priv ring.
Move the code to a new clk op instead so that it is executed only on
gk20a.

Change-Id: Ic8084a4a5fac23770f50b50f910ced2543ba0f28
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/764970
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
This commit is contained in:
Terje Bergstrom
2015-07-01 11:33:39 -07:00
parent e7ba93fefb
commit 4cc1457703
4 changed files with 16 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/gpu/nvgpu/gk20a/clk_gk20a.c
View File

@@ -629,6 +629,17 @@ static int gk20a_clk_register_export_ops(struct gk20a *g)
return ret;
}
static void gk20a_clk_disable_slowboot(struct gk20a *g)
{
u32 data;
data = gk20a_readl(g, trim_sys_gpc2clk_out_r());
data = set_field(data,
trim_sys_gpc2clk_out_bypdiv_m(),
trim_sys_gpc2clk_out_bypdiv_f(0));
gk20a_writel(g, trim_sys_gpc2clk_out_r(), data);
}
static int gk20a_init_clk_support(struct gk20a *g)
{
struct clk_gk20a *clk = &g->clk;
@@ -695,6 +706,7 @@ static int gk20a_suspend_clk_support(struct gk20a *g)
void gk20a_init_clk_ops(struct gpu_ops *gops)
{
gops->clk.disable_slowboot = gk20a_clk_disable_slowboot;
gops->clk.init_clk_support = gk20a_init_clk_support;
gops->clk.suspend_clk_support = gk20a_suspend_clk_support;
}

3
drivers/gpu/nvgpu/gk20a/gk20a.c
View File

@@ -780,6 +780,9 @@ static int gk20a_pm_finalize_poweron(struct device *dev)
bus_intr_en_0_pri_fecserr_m() |
bus_intr_en_0_pri_timeout_m());
if (g->ops.clk.disable_slowboot)
g->ops.clk.disable_slowboot(g);
gk20a_reset_priv_ring(g);
/* TBD: move this after graphics init in which blcg/slcg is enabled.

1
drivers/gpu/nvgpu/gk20a/gk20a.h
View File

@@ -392,6 +392,7 @@ struct gpu_ops {
bool fecsbootstrapdone;
} pmu;
struct {
void (*disable_slowboot)(struct gk20a *g);
int (*init_clk_support)(struct gk20a *g);
int (*suspend_clk_support)(struct gk20a *g);
} clk;

9
drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
View File

@@ -22,21 +22,12 @@
#include "hw_mc_gk20a.h"
#include "hw_pri_ringmaster_gk20a.h"
#include "hw_pri_ringstation_sys_gk20a.h"
#include "hw_trim_gk20a.h"
void gk20a_reset_priv_ring(struct gk20a *g)
{
u32 data;
if (tegra_platform_is_linsim())
return;
data = gk20a_readl(g, trim_sys_gpc2clk_out_r());
data = set_field(data,
trim_sys_gpc2clk_out_bypdiv_m(),
trim_sys_gpc2clk_out_bypdiv_f(0));
gk20a_writel(g, trim_sys_gpc2clk_out_r(), data);
gk20a_reset(g, mc_enable_priv_ring_enabled_f());
if (g->ops.clock_gating.slcg_priring_load_gating_prod)