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Revert "gpu: nvgpu: Dump error on priv ring intr"

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This reverts commit 69d7652aaa.

Bug 1918711

Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Change-Id: Ie28c668729c4956f18e6fa3c820f476d2e4424a4
Reviewed-on: http://git-master/r/1473044
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
This commit is contained in:
Terje Bergstrom
2017-05-01 11:02:33 -07:00
committed by Sai Gurrappadi
parent 966d62e53f
commit 4d1237f132
1 changed files with 3 additions and 3 deletions
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6
drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
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@@ -80,7 +80,7 @@ void gk20a_priv_ring_isr(struct gk20a *g)
status0 = gk20a_readl(g, pri_ringmaster_intr_status0_r());
status1 = gk20a_readl(g, pri_ringmaster_intr_status1_r());
nvgpu_err(g, "ringmaster intr status0: 0x%08x,"
gk20a_dbg(gpu_dbg_intr, "ringmaster intr status0: 0x%08x,"
"status1: 0x%08x", status0, status1);
if (pri_ringmaster_intr_status0_ring_start_conn_fault_v(status0) != 0 ||
@@ -90,7 +90,7 @@ void gk20a_priv_ring_isr(struct gk20a *g)
}
if (pri_ringmaster_intr_status0_gbl_write_error_sys_v(status0) != 0) {
nvgpu_err(g, "SYS write error. ADR %08x WRDAT %08x INFO %08x, CODE %08x",
gk20a_dbg(gpu_dbg_intr, "SYS write error. ADR %08x WRDAT %08x INFO %08x, CODE %08x",
gk20a_readl(g, pri_ringstation_sys_priv_error_adr_r()),
gk20a_readl(g, pri_ringstation_sys_priv_error_wrdat_r()),
gk20a_readl(g, pri_ringstation_sys_priv_error_info_r()),
@@ -99,7 +99,7 @@ void gk20a_priv_ring_isr(struct gk20a *g)
for (gpc = 0; gpc < g->gr.gpc_count; gpc++) {
if (status1 & BIT(gpc)) {
nvgpu_err(g, "GPC%u write error. ADR %08x WRDAT %08x INFO %08x, CODE %08x", gpc,
gk20a_dbg(gpu_dbg_intr, "GPC%u write error. ADR %08x WRDAT %08x INFO %08x, CODE %08x", gpc,
gk20a_readl(g, pri_ringstation_gpc_gpc0_priv_error_adr_r() + gpc * gpc_stride),
gk20a_readl(g, pri_ringstation_gpc_gpc0_priv_error_wrdat_r() + gpc * gpc_stride),
gk20a_readl(g, pri_ringstation_gpc_gpc0_priv_error_info_r() + gpc * gpc_stride),