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gpu: nvgpu: export gk20a_free_priv_cmdbuf
Export gk20a_free_priv_cmdbuf() so that the channel_sync_gk20a.c code can call this function. This is necessary for error paths in the semaphore wait/incr functions. Bug 1732449 JIRA DNVGPU-12 Change-Id: Id2ea13e5553d50475ee1bbf94781e18590321fdf Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1162686 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
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committed by
Terje Bergstrom
parent
1409d216e5
commit
4e21f4a148
@@ -1767,8 +1767,7 @@ fail_unlock:
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gk20a_channel_put(ch);
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}
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static int gk20a_free_priv_cmdbuf(struct channel_gk20a *c,
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struct priv_cmd_entry *e)
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int gk20a_free_priv_cmdbuf(struct channel_gk20a *c, struct priv_cmd_entry *e)
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{
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struct priv_cmd_queue *q = &c->priv_cmd_q;
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struct device *d = dev_from_gk20a(c->g);
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@@ -222,6 +222,7 @@ void gk20a_set_error_notifier(struct channel_gk20a *ch, __u32 error);
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void gk20a_channel_semaphore_wakeup(struct gk20a *g, bool post_events);
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int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 size,
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struct priv_cmd_entry **entry);
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int gk20a_free_priv_cmdbuf(struct channel_gk20a *c, struct priv_cmd_entry *e);
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int gk20a_enable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch);
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int gk20a_disable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch);
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