gpu: nvgpu: gv11b: Reorg mc HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the mc
sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I1a5abde46bf079c206dfdf9f8ee35df048565c49
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1509603
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
This commit is contained in:
Sunny He
2017-06-27 14:05:15 -07:00
committed by mobile promotions
parent aade61eff9
commit 4e290320fd
3 changed files with 25 additions and 13 deletions

View File

@@ -21,6 +21,7 @@
#include "gk20a/gk20a.h"
#include "gk20a/css_gr_gk20a.h"
#include "gk20a/mc_gk20a.h"
#include "gk20a/dbg_gpu_gk20a.h"
#include "gk20a/bus_gk20a.h"
#include "gk20a/flcn_gk20a.h"
@@ -29,6 +30,7 @@
#include "gm20b/gr_gm20b.h"
#include "gp10b/ltc_gp10b.h"
#include "gp10b/mc_gp10b.h"
#include "gp10b/priv_ring_gp10b.h"
#include "hal_gv11b.h"
@@ -200,7 +202,23 @@ static const struct gpu_ops gv11b_ops = {
.pg_gr_load_gating_prod =
gr_gv11b_pg_gr_load_gating_prod,
},
.mc = {
.intr_enable = mc_gv11b_intr_enable,
.intr_unit_config = mc_gp10b_intr_unit_config,
.isr_stall = mc_gp10b_isr_stall,
.intr_stall = mc_gp10b_intr_stall,
.intr_stall_pause = mc_gp10b_intr_stall_pause,
.intr_stall_resume = mc_gp10b_intr_stall_resume,
.intr_nonstall = mc_gp10b_intr_nonstall,
.intr_nonstall_pause = mc_gp10b_intr_nonstall_pause,
.intr_nonstall_resume = mc_gp10b_intr_nonstall_resume,
.enable = gk20a_mc_enable,
.disable = gk20a_mc_disable,
.reset = gk20a_mc_reset,
.boot_0 = gk20a_mc_boot_0,
.is_intr1_pending = mc_gp10b_is_intr1_pending,
.is_intr_hub_pending = gv11b_mc_is_intr_hub_pending,
},
.falcon = {
.falcon_hal_sw_init = gk20a_falcon_hal_sw_init,
},
@@ -215,6 +233,7 @@ int gv11b_init_hal(struct gk20a *g)
gops->ltc = gv11b_ops.ltc;
gops->clock_gating = gv11b_ops.clock_gating;
gops->mc = gv11b_ops.mc;
gops->falcon = gv11b_ops.falcon;
/* Lone functions */
@@ -227,7 +246,6 @@ int gv11b_init_hal(struct gk20a *g)
gops->securegpccs = 0;
gv11b_init_bus(gops);
gv11b_init_mc(gops);
gp10b_init_priv_ring(gops);
gv11b_init_gr(gops);
gv11b_init_fecs_trace_ops(gops);

View File

@@ -24,7 +24,7 @@
#include <nvgpu/hw/gv11b/hw_mc_gv11b.h>
static void mc_gv11b_intr_enable(struct gk20a *g)
void mc_gv11b_intr_enable(struct gk20a *g)
{
u32 eng_intr_mask = gk20a_fifo_engine_interrupt_mask(g);
@@ -57,14 +57,7 @@ static void mc_gv11b_intr_enable(struct gk20a *g)
}
static bool gv11b_mc_is_intr_hub_pending(struct gk20a *g, u32 mc_intr_0)
bool gv11b_mc_is_intr_hub_pending(struct gk20a *g, u32 mc_intr_0)
{
return ((mc_intr_0 & mc_intr_hub_pending_f()) ? true : false);
}
void gv11b_init_mc(struct gpu_ops *gops)
{
gp10b_init_mc(gops);
gops->mc.intr_enable = mc_gv11b_intr_enable;
gops->mc.is_intr_hub_pending = gv11b_mc_is_intr_hub_pending;
}

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -15,5 +15,6 @@
#define MC_GV11B_H
struct gk20a;
void gv11b_init_mc(struct gpu_ops *gops);
void mc_gv11b_intr_enable(struct gk20a *g);
bool gv11b_mc_is_intr_hub_pending(struct gk20a *g, u32 mc_intr_0);
#endif