gpu: nvgpu: Add Fuse prints on PMU Halt

-Print fuse values in case of PMU halt error
-and mailbox reads 0xDEADDEAD

Bug 1737044

Change-Id: Icb9677ca278bd316232e07f1d92980f6deb17125
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/1120988
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
This commit is contained in:
Supriya
2016-03-23 20:33:02 +05:30
committed by Deepak Nibade
parent 85f579c6e5
commit 4e321eb1c8
2 changed files with 21 additions and 0 deletions

View File

@@ -134,4 +134,12 @@ static inline u32 fuse_opt_feature_fuses_override_disable_r(void)
{
return 0x000213f0;
}
static inline u32 fuse_opt_sec_debug_en_r(void)
{
return 0x00021218;
}
static inline u32 fuse_opt_priv_sec_en_r(void)
{
return 0x00021434;
}
#endif

View File

@@ -22,6 +22,7 @@
#include "pmu_gp10b.h"
#include "hw_pwr_gp10b.h"
#include "hw_fuse_gp10b.h"
#include "gp10b_sysfs.h"
#define gp10b_dbg_pmu(fmt, arg...) \
@@ -432,6 +433,17 @@ static bool gp10b_is_priv_load(u32 falcon_id)
return enable_status;
}
/*Dump Security related fuses*/
static void pmu_dump_security_fuses_gp10b(struct gk20a *g)
{
gk20a_err(dev_from_gk20a(g), "FUSE_OPT_SEC_DEBUG_EN_0 : 0x%x",
gk20a_readl(g, fuse_opt_sec_debug_en_r()));
gk20a_err(dev_from_gk20a(g), "FUSE_OPT_PRIV_SEC_EN_0 : 0x%x",
gk20a_readl(g, fuse_opt_priv_sec_en_r()));
gk20a_err(dev_from_gk20a(g), "FUSE_GCPLEX_CONFIG_FUSE_0 : 0x%x",
tegra_fuse_readl(FUSE_GCPLEX_CONFIG_FUSE_0));
}
void gp10b_init_pmu_ops(struct gpu_ops *gops)
{
if (gops->privsecurity) {
@@ -455,4 +467,5 @@ void gp10b_init_pmu_ops(struct gpu_ops *gops)
gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd =
send_ecc_overide_en_dis_cmd;
gops->pmu.reset = gk20a_pmu_reset;
gops->pmu.dump_secure_fuses = pmu_dump_security_fuses_gp10b;
}